[PATCH rdma-next 0/5] RDMA/mlx5: Add NIC_RX_CLASS steering domain for RDMA classification

[Edward Srouji <edwards@nvidia.com>]

mlx5 devices recognise RDMA traffic on receive with a fixed classifier: UDP
destination port 4791. Packets that match are handed to the RDMA receive path
(NIC_RX_RDMA); everything else continues down the normal NIC RX path.

RDMA transports that identify their packet differently don't reach the
RDMA receive path as they use a different packet format entirely.

This series adds NIC_RX_CLASS, a new per-vport receive steering domain placed
ahead of NIC_RX/NIC_RX_RDMA. It gives a privileged RDMA transport manager a
programmable classification stage that supports matching on arbitrary header
fields and marking the packet as RDMA.

NIC_RX_CLASS reuses the model used by RDMA_TRANSPORT_RX/TX domains:
- one root namespace per vport, owned by the eswitch manager;
- targeted from userspace by `ib_port`, as with the existing per-vport
  domains;
- gated by `rdma_transport_manager`, and by
  `rdma_transport_manager_other_eswitch` for the cross-eswitch (LAG /
  socket-direct) case;
- restricted to callers holding the same UCAP that per-port matchers already
  require, so an unprivileged process cannot program another vport's
  classification.

A rule in this domain takes no destination: it matches, attaches a
modify-header action to mark the packet as RDMA and explicitly allows it
onward. ALLOW is the only terminal action the domain accepts; a flow counter
may be attached alongside it.

Patch 1 adds the IFC bits, patch 2 fixes ALLOW handling in the FTE merge
logic, patch 3 unifies the per-vport root namespace init/cleanup helpers,
and patch 4 adds the NIC_RX_CLASS domain itself. Patch 5 exposes the new
domain and the ALLOW action to userspace.

Patches 1-4 are mlx5_core changes and are targeted at the shared mlx5-next
branch, prefixed accordingly; patch 5 depends on them and is targeted at
rdma-next.

Signed-off-by: Edward Srouji <edwards@nvidia.com>
---
Michael Gur (5):
      net/mlx5: Add NIC_RX_CLASS IFC bits
      net/mlx5: fs, treat ALLOW as a conflicting action upon merge
      net/mlx5: fs, refactor RDMA transport manager root namespace init/cleanup
      net/mlx5: fs, add NIC_RX_CLASS steering domain support
      RDMA/mlx5: Expose NIC_RX_CLASS flow table type to userspace

 drivers/infiniband/hw/mlx5/fs.c                   |  59 ++++++-
 drivers/infiniband/hw/mlx5/fs.h                   |   2 +
 drivers/infiniband/hw/mlx5/ib_rep.c               |  25 ++-
 drivers/infiniband/hw/mlx5/mlx5_ib.h              |   1 +
 drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c  |   5 +
 drivers/net/ethernet/mellanox/mlx5/core/fs_core.c | 178 +++++++++-------------
 drivers/net/ethernet/mellanox/mlx5/core/fs_core.h |  15 +-
 include/linux/mlx5/device.h                       |   3 +
 include/linux/mlx5/fs.h                           |   4 +-
 include/linux/mlx5/mlx5_ifc.h                     |   9 +-
 include/uapi/rdma/mlx5_user_ioctl_cmds.h          |   1 +
 include/uapi/rdma/mlx5_user_ioctl_verbs.h         |   1 +
 12 files changed, 173 insertions(+), 130 deletions(-)
---
base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
change-id: 20261103-rdma-rx-classifier-866946b90d6a

Best regards,
-- 
Edward Srouji <edwards@nvidia.com>