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From: Edward Srouji <edwards@nvidia.com>
To: Saeed Mahameed <saeedm@nvidia.com>,
	Leon Romanovsky <leon@kernel.org>,
	Tariq Toukan <tariqt@nvidia.com>, Mark Bloch <mbloch@nvidia.com>,
	Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	"Eric Dumazet" <edumazet@kernel.org>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Jason Gunthorpe <jgg@ziepe.ca>,
	Yishai Hadas <yishaih@mellanox.com>
Cc: Edward Srouji <edwards@nvidia.com>, <linux-rdma@vger.kernel.org>,
	<netdev@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Mark Bloch <markb@mellanox.com>,
	Michael Gur <michaelgur@nvidia.com>,
	Patrisious Haddad <phaddad@nvidia.com>
Subject: [PATCH mlx5-next 1/5] net/mlx5: Add NIC_RX_CLASS IFC bits
Date: Tue, 3 Nov 2026 20:12:49 +0200	[thread overview]
Message-ID: <20261103-rdma-rx-classifier-v1-1-1ad6c8cfe936@nvidia.com> (raw)
In-Reply-To: <20261103-rdma-rx-classifier-v1-0-1ad6c8cfe936@nvidia.com>

From: Michael Gur <michaelgur@nvidia.com>

Expose NIC_RX_CLASS capabilities in ADV_RDMA struct to allow exposing
the new steering domain to users in the following patches.

Signed-off-by: Michael Gur <michaelgur@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Reviewed-by: Patrisious Haddad <phaddad@nvidia.com>
Signed-off-by: Edward Srouji <edwards@nvidia.com>
---
 include/linux/mlx5/mlx5_ifc.h | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 697fc9387b73ae1dd2305d475f7fdc767a1a2cdd..a7cf67264a1799ad179938907f5c871c9190f9e5 100644
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -13690,7 +13690,14 @@ struct mlx5_ifc_adv_rdma_cap_bits {
 
 	struct mlx5_ifc_flow_table_fields_supported_2_bits rdma_transport_tx_ft_field_bitmask_support_2;
 
-	u8         reserved_at_800[0x3800];
+	u8         reserved_at_800[0x400];
+	u8         reserved_at_c00[0x400];
+
+	struct mlx5_ifc_flow_table_prop_layout_bits nic_rx_class_flow_table_properties;
+
+	u8         reserved_at_1200[0x500];
+
+	u8         reserved_at_1700[0x2900];
 };
 
 struct mlx5_ifc_adv_virtualization_cap_bits {

-- 
2.49.0


  reply	other threads:[~2026-11-03 18:13 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 18:12 [PATCH rdma-next 0/5] RDMA/mlx5: Add NIC_RX_CLASS steering domain for RDMA classification Edward Srouji
2026-11-03 18:12 ` Edward Srouji [this message]
2026-11-03 18:12 ` [PATCH mlx5-next 2/5] net/mlx5: fs, treat ALLOW as a conflicting action upon merge Edward Srouji
2026-11-03 18:12 ` [PATCH mlx5-next 3/5] net/mlx5: fs, refactor RDMA transport manager root namespace init/cleanup Edward Srouji
2026-11-03 18:12 ` [PATCH mlx5-next 4/5] net/mlx5: fs, add NIC_RX_CLASS steering domain support Edward Srouji
2026-11-03 18:12 ` [PATCH rdma-next 5/5] RDMA/mlx5: Expose NIC_RX_CLASS flow table type to userspace Edward Srouji

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