[PATCH] cpufreq: intel_pstate: Use rdmsrq_safe() to read MSR_MISC_PWR_MGMT

[Li Zhaoxin <lizhaoxin04@baidu.com>]

From: lizhaoxin04 <lizhaoxin04@baidu.com>

Commit ed7cad0504e3 ("cpufreq: intel_pstate: Relocate platform
preference check") moved the intel_pstate_platform_pwr_mgmt_exists()
call to the beginning of intel_pstate_init(), right after the vendor
check, so it now runs before "no_load" (intel_pstate=disable) and the
other checks.

MSR_MISC_PWR_MGMT is model-specific and KVM does not emulate it. In a
KVM guest using a CPU model listed in intel_pstate_cpu_oob_ids[] (for
example "-cpu host" on Emerald Rapids), reading it raises #GP and the
unchecked rdmsrq() emits a warning with a call trace on every boot, even
with intel_pstate=disable:

  unchecked MSR access error: RDMSR from 0x1aa at rIP: 0xffffffffa4009342 (native_read_msr+0x2/0x50)
  Call Trace:
   <TASK>
   intel_pstate_platform_pwr_mgmt_exists+0x3b/0x220
   intel_pstate_init+0x1e/0x500
   do_one_initcall+0x59/0x350
   ...

Before that commit, such guests typically returned from
intel_pstate_init() earlier, either because of intel_pstate=disable or
because intel_pstate_msrs_not_valid() failed on the zero ratios that
KVM reports in MSR_PLATFORM_INFO by default, so the MSR was not read.

Use rdmsrq_safe() and treat a failing read as "no OOB mode". The
exception fixup already zeroes the result of a failed unchecked read,
so apart from the warning going away there is no functional change.

Fixes: ed7cad0504e3 ("cpufreq: intel_pstate: Relocate platform preference check")
Cc: stable@vger.kernel.org
Signed-off-by: Li Zhaoxin <lizhaoxin04@baidu.com>
---
 drivers/cpufreq/intel_pstate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 0e6ae4cdda5d..67447280e86a 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -3649,12 +3649,12 @@ static struct acpi_platform_list plat_info[] __initdata = {
 static bool __init intel_pstate_platform_pwr_mgmt_exists(void)
 {
 	const struct x86_cpu_id *id;
-	u64 misc_pwr;
+	u64 misc_pwr = 0;
 	int idx;
 
 	id = x86_match_cpu(intel_pstate_cpu_oob_ids);
 	if (id) {
-		rdmsrq(MSR_MISC_PWR_MGMT, misc_pwr);
+		rdmsrq_safe(MSR_MISC_PWR_MGMT, &misc_pwr);
 		if (misc_pwr & BITMASK_OOB) {
 			pr_debug("Bit 8 or 18 in the MISC_PWR_MGMT MSR set\n");
 			pr_debug("P states are controlled in Out of Band mode by the firmware/hardware\n");

base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
-- 
2.43.0