From: xiaoning.wang@oss.nxp.com
To: netdev@vger.kernel.org
Cc: Claudiu Manoil <claudiu.manoil@nxp.com>,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Wei Fang <wei.fang@nxp.com>, Andrew Lunn <andrew+netdev@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Richard Cochran <richardcochran@gmail.com>,
imx@lists.linux.dev, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Clark Wang <xiaoning.wang@nxp.com>
Subject: [PATCH net-next 4/4] ptp: netc: use 133MHz as the default reference clock rate for i.MX952
Date: Wed, 4 Nov 2026 17:22:17 +0800 [thread overview]
Message-ID: <20261104092217.1730351-5-xiaoning.wang@oss.nxp.com> (raw)
In-Reply-To: <20261104092217.1730351-1-xiaoning.wang@oss.nxp.com>
From: Clark Wang <xiaoning.wang@nxp.com>
If the 'clocks' property is not present in the DT node, the NETC system
clock is selected as the reference clock of the NETC Timer, and the
driver assumes that its rate is 333MHz. However, the NETC system clock
of i.MX952 (NETC v4.6) is 133MHz. Therefore, use 133MHz as the default
reference clock rate for i.MX952.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
---
drivers/ptp/ptp_netc.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/ptp/ptp_netc.c b/drivers/ptp/ptp_netc.c
index 19ca99d80e95..e2f7dd8595f1 100644
--- a/drivers/ptp/ptp_netc.c
+++ b/drivers/ptp/ptp_netc.c
@@ -72,6 +72,7 @@
#define NETC_GLOBAL_IPBRR0 0xbf8
#define IPBRR0_IP_REV GENMASK(15, 0)
#define NETC_REV_4_1 0x0401
+#define NETC_REV_4_6 0x0406
#define NETC_TMR_FIPER_NUM 3
#define NETC_TMR_INVALID_CHANNEL NETC_TMR_FIPER_NUM
@@ -88,6 +89,7 @@
#define NETC_TMR_EXT_OSC 2 /* tmr_1588_clk, from IO pins */
#define NETC_TMR_SYSCLK_333M 333333333U
+#define NETC_TMR_SYSCLK_133M 133333333U
enum netc_pp_type {
NETC_PP_PPS = 1,
@@ -858,7 +860,10 @@ static int netc_timer_get_reference_clk_source(struct netc_timer *priv)
/* Select NETC system clock as the reference clock by default */
priv->clk_select = NETC_TMR_SYSTEM_CLK;
- priv->clk_freq = NETC_TMR_SYSCLK_333M;
+ if (priv->revision == NETC_REV_4_6)
+ priv->clk_freq = NETC_TMR_SYSCLK_133M;
+ else
+ priv->clk_freq = NETC_TMR_SYSCLK_333M;
/* Update the clock source of the reference clock if the clock
* is specified in DT node.
--
2.43.0
next prev parent reply other threads:[~2026-11-04 9:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 9:22 [PATCH net-next 0/4] net: enetc: add i.MX952 NETC v4.6 support xiaoning.wang
2026-11-04 9:22 ` [PATCH net-next 1/4] dt-bindings: net: netc-blk-ctrl: add compatible string for i.MX952 platforms xiaoning.wang
2026-11-04 9:22 ` [PATCH net-next 2/4] net: enetc: add i.MX952 NETC blocks control support xiaoning.wang
2026-11-04 9:22 ` [PATCH net-next 3/4] net: enetc: add i.MX952 ENETC support xiaoning.wang
2026-11-04 9:22 ` xiaoning.wang [this message]
2026-11-04 9:43 ` [PATCH net-next 4/4] ptp: netc: use 133MHz as the default reference clock rate for i.MX952 Daniel Baluta
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