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From: Mateusz Nowicki <mateusz.nowicki@posteo.net>
To: Ulf Hansson <ulfh@kernel.org>, linux-mmc@vger.kernel.org
Cc: Mateusz Nowicki <mateusz.nowicki@posteo.net>,
	Russell King <linux@armlinux.org.uk>,
	Linus Walleij <linusw@kernel.org>,
	Yann Gautier <yann.gautier@foss.st.com>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	devicetree@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 0/5] mmc: mmci: stm32: silent data corruption and HS200 fixes
Date: Wed, 04 Nov 2026 15:27:16 +0000	[thread overview]
Message-ID: <20261104152657.14909-1-mateusz.nowicki@posteo.net> (raw)

The eMMC of the STM32MP257F-DK in HS200 returned stale data and lost
writes without any error. Patch 1 makes data CRC errors visible to the
core again. Patches 2 and 3 are the fixes of the ST downstream kernel
for the causes seen on the DK, as Christophe pointed out. Patches 4 and
5 move the eMMC of the DK back to the sdmmc2 pins_a groups and remove
the pins_b groups I added for it in 7.4: the corruption came from the
delay block, not from the slew rate, and the slower pins avoid
overshoots on the SDMMC2 clock. Patches 1-3 are for the mmc tree, 4 and
5 for the STM32 device tree, patch 4 needs patch 3.

Tested on the STM32MP257F-DK with a v7.3-rc6 based kernel with the same
changes, each run writing 832 MiB to the eMMC and reading it back:

- SDMMC2 kernel clock 200 MHz, HS200 at 100 MHz as in mainline: without
  patch 3 the writes failed with I/O errors in all 9 runs (sdmmc2 pins_a
  or pins_b, with or without NEGEDGE), with it all 6 runs were correct
  (pins_a and pins_b).
- SDMMC2 kernel clock 150 MHz, HS200 at 150 MHz with the delay block:
  all 6 runs correct (pins_a and pins_b), the tuning picked the same
  phase in all 10 rebinds on each pin group.

Build tested on v7.4-rc1 (arm64 defconfig, W=1). Not tested on
STM32MP1x.

Changes in v2:
- Drop "mmc: mmci: stm32: do not use NEGEDGE in HS200 mode". NEGEDGE
  has no effect with CLKDIV = 0 and is valid with a divider, I misread
  RM0457 (Christophe). The writes at 100 MHz fail because of the delay
  block, not NEGEDGE.
- Replace "mmc: mmci: stm32: lock the STM32MP25 delay block again before
  tuning" with the same change from the ST downstream kernel, "mmc: mmci:
  stm32: release the delay block before enabling it" (Christophe).
- Add "mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25
  SoC" from the ST downstream kernel (Christophe), with dlyb checked
  before reading min_freq from it.
- Add "arm64: dts: st: use sdmmc2 pins_a on stm32mp257f-dk" and
  "arm64: dts: st: remove sdmmc2 pins_b from stm32mp25" (Christophe).
- Rebase on v7.4-rc1.
- Link to v1: https://lore.kernel.org/r/20261031120700.42576-1-mateusz.nowicki@posteo.net

Christophe Kerello (2):
  mmc: mmci: stm32: release the delay block before enabling it
  mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25 SoC

Mateusz Nowicki (3):
  mmc: mmci: do not count a data CRC error as a complete transfer
  arm64: dts: st: use sdmmc2 pins_a on stm32mp257f-dk
  arm64: dts: st: remove sdmmc2 pins_b from stm32mp25

 arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 58 -------------------
 arch/arm64/boot/dts/st/stm32mp257f-dk.dts     |  4 +-
 drivers/mmc/host/mmci.c                       |  5 +-
 drivers/mmc/host/mmci_stm32_sdmmc.c           | 28 +++++++--
 4 files changed, 27 insertions(+), 68 deletions(-)


base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
-- 
2.56.0


             reply	other threads:[~2026-11-04 15:27 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-04 15:27 Mateusz Nowicki [this message]
2026-11-04 15:27 ` [PATCH v2 1/5] mmc: mmci: do not count a data CRC error as a complete transfer Mateusz Nowicki
2026-11-04 15:27 ` [PATCH v2 2/5] mmc: mmci: stm32: release the delay block before enabling it Mateusz Nowicki
2026-11-04 15:27 ` [PATCH v2 3/5] mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25 SoC Mateusz Nowicki
2026-11-04 15:27 ` [PATCH v2 4/5] arm64: dts: st: use sdmmc2 pins_a on stm32mp257f-dk Mateusz Nowicki
2026-11-04 15:27 ` [PATCH v2 5/5] arm64: dts: st: remove sdmmc2 pins_b from stm32mp25 Mateusz Nowicki

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