* [PATCH v4 1/2] platform/chrome: cros_ec_typec: Enforce priority-based mode selection
2026-11-05 15:59 [PATCH v4 0/2] USB Type-C mode selection Andrei Kuchynski
@ 2026-11-05 15:59 ` Andrei Kuchynski
2026-11-05 15:59 ` [PATCH v4 2/2] platform/chrome: cros_ec_typec: Reorder altmode registration Andrei Kuchynski
2026-11-06 2:32 ` [PATCH v4 0/2] USB Type-C mode selection Tzung-Bi Shih
2 siblings, 0 replies; 4+ messages in thread
From: Andrei Kuchynski @ 2026-11-05 15:59 UTC (permalink / raw)
To: Tzung-Bi Shih
Cc: Jameson Thies, Benson Leung, Abhishek Pandit-Subedi,
Guenter Roeck, chrome-platform, linux-kernel, Andrei Kuchynski
The driver sets mode_selection bit for each Alternate mode, thereby
preventing individual altmode drivers from activating their respective
modes.
Once the registration of all Alternate Modes is complete, the driver
verifies if USB4 mode is supported by both the port and the partner and
activates USB4 mode. In cases where USB4 is not supported, the driver
invokes typec_mode_selection_start to initiate the mode selection process
based on mode priorities.
The driver communicates the current Type-C mode to the mode selection
process via typec_altmode_state_update.
Signed-off-by: Andrei Kuchynski <akuchynski@chromium.org>
---
drivers/platform/chrome/cros_ec_typec.c | 42 ++++++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
index 5871fe031f14d..aeb3de4f09934 100644
--- a/drivers/platform/chrome/cros_ec_typec.c
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -39,6 +39,11 @@
BIT(DP_PIN_ASSIGN_D) | \
BIT(DP_PIN_ASSIGN_E)))
+/* Delay between mode entry/exit attempts, ms */
+#define MODE_SELECTION_DELAY 1000
+/* Timeout for a mode entry attempt, ms */
+#define MODE_SELECTION_TIMEOUT 4000
+
static void cros_typec_role_switch_quirk(struct fwnode_handle *fwnode)
{
#ifdef CONFIG_ACPI
@@ -363,6 +368,7 @@ static void cros_typec_remove_partner(struct cros_typec_data *typec,
if (!port->partner)
return;
+ typec_mode_selection_delete(port->partner);
cros_typec_unregister_altmodes(typec, port_num, true);
typec_partner_set_usb_power_delivery(port->partner, NULL);
@@ -459,7 +465,6 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec,
memset(&desc, 0, sizeof(desc));
desc.svid = USB_TYPEC_TBT_SID;
desc.mode = TBT_MODE;
- desc.inactive = true;
amode = cros_typec_register_thunderbolt(port, &desc);
if (IS_ERR(amode))
return PTR_ERR(amode);
@@ -780,6 +785,7 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num,
enum typec_orientation orientation;
struct cros_typec_altmode_node *node;
int ret;
+ u16 active_svid = 0;
ret = cros_ec_cmd(typec->ec, 0, EC_CMD_USB_PD_MUX_INFO,
&req, sizeof(req), &resp, sizeof(resp));
@@ -818,10 +824,14 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num,
if (port->mux_flags & USB_PD_MUX_USB4_ENABLED) {
ret = cros_typec_enable_usb4(typec, port_num, pd_ctrl);
+ if (!ret)
+ typec_partner_set_usb_mode(port->partner, USB_MODE_USB4);
} else if (port->mux_flags & USB_PD_MUX_TBT_COMPAT_ENABLED) {
ret = cros_typec_enable_tbt(typec, port_num, pd_ctrl);
+ active_svid = USB_TYPEC_TBT_SID;
} else if (port->mux_flags & USB_PD_MUX_DP_ENABLED) {
ret = cros_typec_enable_dp(typec, port_num, pd_ctrl);
+ active_svid = USB_TYPEC_DP_SID;
} else if (port->mux_flags & USB_PD_MUX_SAFE_MODE) {
ret = cros_typec_usb_safe_state(port);
} else if (port->mux_flags & USB_PD_MUX_USB_ENABLED) {
@@ -837,6 +847,9 @@ static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num,
port->mux_flags);
}
+ if (port->partner)
+ typec_altmode_state_update(port->partner, active_svid, ret);
+
/* Iterate all partner alt-modes and set the active alternate mode. */
list_for_each_entry(node, &port->partner_mode_list, list) {
typec_altmode_update_active(
@@ -946,6 +959,7 @@ static int cros_typec_register_altmodes(struct cros_typec_data *typec, int port_
desc.svid = sop_disc->svids[i].svid;
desc.mode = j + 1;
desc.vdo = sop_disc->svids[i].mode_vdo[j];
+ desc.mode_selection = typec->ap_driven_altmode;
if (is_partner)
amode = typec_partner_register_altmode(port->partner, &desc);
@@ -986,6 +1000,32 @@ static int cros_typec_register_altmodes(struct cros_typec_data *typec, int port_
goto err_cleanup;
}
+ /*
+ * Once all partner alt-modes are added, we should also trigger
+ * mode selection.
+ */
+ if (is_partner && typec->ap_driven_altmode) {
+ bool usb4_mode = (port->caps.usb_capability & USB_CAPABILITY_USB4) &&
+ (PD_VDO_UFP_DEVCAP(port->p_identity.vdo[0]) & DEV_USB4_CAPABLE);
+
+ if (usb4_mode) {
+ ret = cros_typec_enter_usb_mode(port->port, USB_MODE_USB4);
+ if (ret < 0) {
+ usb4_mode = false;
+ dev_warn(typec->dev,
+ "Unable to activate USB4 mode, port: %d\n", port_num);
+ }
+ }
+ if (!usb4_mode) {
+ ret = typec_mode_selection_start(port->partner,
+ MODE_SELECTION_DELAY,
+ MODE_SELECTION_TIMEOUT);
+ if (ret < 0)
+ dev_warn(typec->dev,
+ "Unable to run mode selection, port: %d\n", port_num);
+ }
+ }
+
return 0;
err_cleanup:
--
2.56.0.398.g882cbad275-goog
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH v4 2/2] platform/chrome: cros_ec_typec: Reorder altmode registration
2026-11-05 15:59 [PATCH v4 0/2] USB Type-C mode selection Andrei Kuchynski
2026-11-05 15:59 ` [PATCH v4 1/2] platform/chrome: cros_ec_typec: Enforce priority-based " Andrei Kuchynski
@ 2026-11-05 15:59 ` Andrei Kuchynski
2026-11-06 2:32 ` [PATCH v4 0/2] USB Type-C mode selection Tzung-Bi Shih
2 siblings, 0 replies; 4+ messages in thread
From: Andrei Kuchynski @ 2026-11-05 15:59 UTC (permalink / raw)
To: Tzung-Bi Shih
Cc: Jameson Thies, Benson Leung, Abhishek Pandit-Subedi,
Guenter Roeck, chrome-platform, linux-kernel, Andrei Kuchynski
By default, alternate mode priorities are set in registration order, with
the last mode registered taking precedence. Changing the registration order
of alternate modes prioritizes DisplayPort over Thunderbolt.
Signed-off-by: Andrei Kuchynski <akuchynski@chromium.org>
---
drivers/platform/chrome/cros_ec_typec.c | 25 +++++++++++++++----------
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
index aeb3de4f09934..b13b0914a2cea 100644
--- a/drivers/platform/chrome/cros_ec_typec.c
+++ b/drivers/platform/chrome/cros_ec_typec.c
@@ -444,16 +444,10 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec,
struct typec_altmode_desc desc;
struct typec_altmode *amode;
- /* All PD capable CrOS devices are assumed to support DP altmode. */
- memset(&desc, 0, sizeof(desc));
- desc.svid = USB_TYPEC_DP_SID;
- desc.mode = USB_TYPEC_DP_MODE;
- desc.vdo = DP_PORT_VDO;
- amode = cros_typec_register_displayport(port, &desc,
- typec->ap_driven_altmode);
- if (IS_ERR(amode))
- return PTR_ERR(amode);
- port->port_altmode[CROS_EC_ALTMODE_DP] = amode;
+ /*
+ * Alternate modes registered later take precedence. Register DisplayPort
+ * after Thunderbolt to prioritize DisplayPort over Thunderbolt.
+ */
/*
* Register TBT compatibility alt mode. The EC will not enter the mode
@@ -471,6 +465,17 @@ static int cros_typec_register_port_altmodes(struct cros_typec_data *typec,
port->port_altmode[CROS_EC_ALTMODE_TBT] = amode;
}
+ /* All PD capable CrOS devices are assumed to support DP altmode. */
+ memset(&desc, 0, sizeof(desc));
+ desc.svid = USB_TYPEC_DP_SID;
+ desc.mode = USB_TYPEC_DP_MODE;
+ desc.vdo = DP_PORT_VDO;
+ amode = cros_typec_register_displayport(port, &desc,
+ typec->ap_driven_altmode);
+ if (IS_ERR(amode))
+ return PTR_ERR(amode);
+ port->port_altmode[CROS_EC_ALTMODE_DP] = amode;
+
port->state.alt = NULL;
port->state.mode = TYPEC_STATE_USB;
port->state.data = NULL;
--
2.56.0.398.g882cbad275-goog
^ permalink raw reply [flat|nested] 4+ messages in thread