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From: Jelly Jia <Jelly.Jia@cixtech.com>
To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, robin.murphy@arm.com
Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org,
	cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com
Subject: [PATCH v6 0/5] dmaengine: arm-dma350: Add slave support and Sky1 integration
Date: Fri,  6 Nov 2026 09:34:48 +0800	[thread overview]
Message-ID: <20261106013453.1134239-1-Jelly.Jia@cixtech.com> (raw)

Hello,

This series adds scatter-gather and cyclic slave transfer support to the
Arm DMA-350 driver, then describes the clock, reset and DMA address view
of the CIX Sky1 FCH integration.

Patch 1 fixes the source-trigger bit. Patch 2 adds peripheral transfers
with descriptor-owned resource mappings, coherent linked commands and
hardware-based residue reporting. Patches 3 and 4 describe and handle
integration clocks and resets. Patch 5 describes the FCH DMA address
windows and adds its bus clock.

Sky1 controller nodes use cix,sky1-dma350 with an arm,dma-350 fallback.
The binding requires a bus clock for Sky1 and leaves its reset optional;
both resources remain optional for the generic compatible alone. The
driver uses standard optional resource helpers and introduces no
CIX-specific register programming. The companion AUDSS interrupt-path
series builds on this one and manages the AUDSS interrupt gates in the
CRU driver.

Changes since v5:
- Add the Sky1 compatible with a generic fallback and require clocks for
  Sky1 only. Keep resets optional and update the FCH node. (Frank.)
- Initialize the request to an invalid sentinel and clear request/config
  state when channel resources are freed, but retain it across terminate.
  (Sashiko, followed up by Frank.)
- Keep a failed channel in DMA_ERROR until termination, preventing queued
  work from overwriting the failed cookie's status and residue. Allow
  terminate to clear the error without an active descriptor.
  (Sashiko, followed up by Frank.)
- Add Frank's Reviewed-by to the unchanged clock/reset driver patch.

Previous version:
https://lore.kernel.org/r/20261104124411.296640-1-Jelly.Jia@cixtech.com

Jelly Jia (5):
  dmaengine: arm-dma350: Fix source trigger bit
  dmaengine: arm-dma350: Add slave and cyclic transfer support
  dt-bindings: dma: arm,dma-350: Describe the CIX Sky1 integration
  dmaengine: arm-dma350: Support integration clocks and resets
  arm64: dts: cix: Describe the Sky1 FCH DMA-350 integration

 .../devicetree/bindings/dma/arm,dma-350.yaml  |  30 +-
 arch/arm64/boot/dts/cix/sky1.dtsi             |  36 +-
 drivers/dma/arm-dma350.c                      | 837 +++++++++++++++++-
 3 files changed, 856 insertions(+), 47 deletions(-)


base-commit: 6628e7d4c6b25c8d18f1345e3a20d21829aae7e4
-- 
2.54.0


             reply	other threads:[~2026-11-06  1:35 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-06  1:34 Jelly Jia [this message]
2026-11-06  1:34 ` [PATCH v6 1/5] dmaengine: arm-dma350: Fix source trigger bit Jelly Jia
2026-11-06  1:34 ` [PATCH v6 2/5] dmaengine: arm-dma350: Add slave and cyclic transfer support Jelly Jia
2026-11-06  1:34 ` [PATCH v6 3/5] dt-bindings: dma: arm,dma-350: Describe the CIX Sky1 integration Jelly Jia
2026-11-06  1:34 ` [PATCH v6 4/5] dmaengine: arm-dma350: Support integration clocks and resets Jelly Jia
2026-11-06  1:34 ` [PATCH v6 5/5] arm64: dts: cix: Describe the Sky1 FCH DMA-350 integration Jelly Jia

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