From: Nikolas Joshua Britton <nbritton@exabit.io>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: "Maciej Grochowski" <Maciej.Grochowski@sony.com>,
"Geramy Loveless" <gloveless@jqluv.com>,
"Eric Auger" <eauger@redhat.com>,
"Alexey Fomenko" <alexey.fomenko@intel.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-pci@vger.kernel.org,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Mesih Kilinc" <Mesih.Kilinc@sony.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 00/14] PCI: Resource placement algorithm fixes
Date: Fri, 6 Nov 2026 15:26:42 +0000 [thread overview]
Message-ID: <20261106152642.23118-1-nbritton@exabit.io> (raw)
In-Reply-To: <20261106134341.39493-1-ilpo.jarvinen@linux.intel.com>
On Fri, 6 Nov 2026, Ilpo Järvinen wrote:
> There have been major changes so any retesting is appreciated (the
> 4 candidates patch is largely the same so I kept the Tested-by tags but
> everything around has been changing so even that is on the borderline
> when it comes to the validity of the existing tags).
I retested v5 on the Mac Pro 7,1 from my report (two Vega II Duo cards,
four Vega 20 dies behind two root ports, BAR0 resized to 32G on every
die).
v7.3 and later don't boot on this machine for reasons unrelated to this
series, so I tested on v7.2.15 plus 5012a6953208 ("PCI: Do not add
hotplug reservation multiple times"), which 11/14 and 12/14 depend on.
All 14 patches then apply as posted, and drivers/pci/setup-bus.c and
drivers/pci/setup-res.c come out byte-identical to v7.4-rc1 + v5.
Every BAR is assigned, both root port windows are 96G, and all four dies
get their 32G BAR0. The first root port:
pci 0000:06:00.0: bridge window [mem 0x9e800000000-0x9ffffffffff 64bit pref]: assigned
pci 0000:07:00.0: bridge window [mem 0x9e800000000-0x9ffffffffff 64bit pref]: assigned
pci 0000:08:08.0: bridge window [mem 0x9f7ffe00000-0x9ffffffffff 64bit pref]: assigned
pci 0000:08:10.0: bridge window [mem 0x9e800000000-0x9f0001fffff 64bit pref]: assigned
pci 0000:0b:00.0: BAR 0 [mem 0x9f800000000-0x9ffffffffff 64bit pref]: assigned
pci 0000:0b:00.0: BAR 2 [mem 0x9f7ffe00000-0x9f7ffffffff 64bit pref]: assigned
pci 0000:0e:00.0: BAR 0 [mem 0x9e800000000-0x9efffffffff 64bit pref]: assigned
pci 0000:0e:00.0: BAR 2 [mem 0x9f000000000-0x9f0001fffff 64bit pref]: assigned
The second root port (14:00.0) has the same layout at 0xbe800000000.
Compared with v4, the two die chains swapped ends of the window: 08:08.0
and the windows nested below it (09:00.0, 0a:00.0) now sit at the top,
with the 2M BAR2 at their left edge. That is the case the dropped
nested-window fix covered, and it still assigns without that patch.
amdgpu binds all four dies and compute across them works.
Tested-by: Nikolas Joshua Britton <nbritton@exabit.io>
next prev parent reply other threads:[~2026-11-06 15:26 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 13:43 Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 01/14] resource: Mark free space assigned Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 02/14] parisc/PCI: Clean up resource debug print & use dynamic debug Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 03/14] PCI: Don't size or assign disabled BARs Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 04/14] PCI: Use __ffs64() for resource_size_t typed align Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 05/14] PCI: Prevent zero align from reaching __ffs64() Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 06/14] linux/log2.h: Add 64-bit roundup/down_pow_of_two_u64() variants Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 07/14] PCI: Derive aligns[] array size in a define Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 08/14] PCI: Honor alignment overrides Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 09/14] PCI: Place resources to either edge of the window Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 10/14] PCI: Separate align/raw size calculation from pbus_size_mem() Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 11/14] PCI: Calculate bridge window with optional sizes from scratch Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 12/14] PCI: Move size/align calculation fully into __pbus_size_mem() Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 13/14] PCI: Fix composite resource sizing Ilpo Järvinen
2026-11-06 13:43 ` [PATCH v5 14/14] PCI: Add debug printing to window sizing Ilpo Järvinen
2026-11-06 15:26 ` Nikolas Joshua Britton [this message]
2026-11-06 16:43 ` [PATCH v5 00/14] PCI: Resource placement algorithm fixes Ilpo Järvinen
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