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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
Cc: Rob Clark <robin.clark@oss.qualcomm.com>,
	 Dmitry Baryshkov <lumag@kernel.org>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	 Jessica Zhang <jesszhan0024@gmail.com>,
	Sean Paul <sean@poorly.run>,
	 Marijn Suijten <marijn.suijten@somainline.org>,
	David Airlie <airlied@gmail.com>,
	 Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	 Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	 Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Krishna Manikandan <quic_mkrishn@quicinc.com>,
	 Abel Vesa <abelvesa@kernel.org>,
	Yuanjie Yang <yuanjie.yang@oss.qualcomm.com>,
	 Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	 linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
	freedreno@lists.freedesktop.org,  devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	 Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Joonhoe Kim <26rote@gmail.com>
Subject: Re: [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali
Date: Mon, 9 Nov 2026 13:26:16 +0100	[thread overview]
Message-ID: <20261109-industrious-impetuous-slug-a8e4ce@quoll> (raw)
In-Reply-To: <20261109-msm_gdsc2-v5-2-4a3159b5e4b8@oss.qualcomm.com>

On Mon, Nov 09, 2026 at 04:36:36PM +0800, Yongxing Mou wrote:
> Kaanapali's DPU is supplied by both CORE and INT2 GDSCs. The
> power-domain core only auto-attaches a single domain; with multiple
> domains the device is left unattached, so both domains must be attached
> explicitly.
> 
> The DPU OPP table also needs to continue controlling the MMCX
> performance state. Mark CORE as the required OPP domain so its vote is
> propagated through the genpd hierarchy to MMCX. INT2 has no OPP of its
> own and is attached as a regular runtime-PM supplier.
> 
> Platforms with a single power domain remain unaffected and continue to
> use the existing automatic attachment.
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Tested-by: Joonhoe Kim <26rote@gmail.com>

Where? No tests were at v3 and v4.

Best regards,
Krzysztof


  reply	other threads:[~2026-11-09 12:26 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-09  8:36 [PATCH v5 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali Yongxing Mou
2026-11-09  8:36 ` [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU Yongxing Mou
2026-11-09 12:25   ` Krzysztof Kozlowski
2026-11-09  8:36 ` [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali Yongxing Mou
2026-11-09 12:26   ` Krzysztof Kozlowski [this message]
2026-11-09  8:36 ` [PATCH v5 3/3] arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU Yongxing Mou

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