* [PATCH v5 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali
@ 2026-11-09 8:36 Yongxing Mou
2026-11-09 8:36 ` [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU Yongxing Mou
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Yongxing Mou @ 2026-11-09 8:36 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Krishna Manikandan, Abel Vesa,
Yuanjie Yang, Bjorn Andersson, Konrad Dybcio
Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel,
Yongxing Mou, Joonhoe Kim, Dmitry Baryshkov, Abel Vesa,
Konrad Dybcio
Kaanapali (SM8850) has an additional INT2 GDSC that powers a
subset of DPU source pipes (VIG2/VIG3/DMA5). Without enabling
it, those pipes remain inaccessible.
This series describes CORE and INT2 as the DPU power domains,
updates the DT bindings accordingly, and explicitly attaches both
domains in the DPU driver. DPU performance-state votes on CORE
are propagated through the genpd hierarchy to MMCX.
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
---
Changes in v5:
- Use 'contains:' for compatible matching in the if-condition (Krzysztof)
- Move power-domain-names items to top-level properties; only constrain
minItems in then-block (Krzysztof)
- Link to v4: https://lore.kernel.org/r/20261023-msm_gdsc2-v4-0-40b6a71d4e3f@oss.qualcomm.com
Changes in v4:
- Keep the widest power-domain constraint in the common schema (Krzysztof)
- Link to v3: https://lore.kernel.org/r/20261014-msm_gdsc2-v3-0-f1ed69014416@oss.qualcomm.com
Changes in v3:
- Replaced MMCX with CORE as the DPU power domain, keeping INT2 as the second domain
(Dmitry)
- Used generic "core" and "int2" power-domain names (Dmitry)
- Propagated DPU OPP votes from CORE to its parent MMCX domain
- Updated the Kaanapali MDSS example and fixed issues reported by dt_binding_check
- Link to v2: https://lore.kernel.org/r/20260915-msm_gdsc2-v2-0-9157237b8382@oss.qualcomm.com
Changes in v2:
- Moved INT2 GDSC from MDSS to DPU, as it only powers DPU-local source pipes (Dmitry)
- Dropped Glymur — only Kaanapali actually needs INT2 GDSC
- Used if/then in DT binding to restrict second power domain to Kaanapali compatible only (Dmitry, Krzysztof)
- Dropped PD_FLAG_NO_DEV_LINK, let device link auto-attach handle INT2 as runtime-PM supplier (Dmitry)
- Link to v1: https://lore.kernel.org/r/20260720-msm_gdsc2-v1-0-4687866d6cb0@oss.qualcomm.com
---
Yongxing Mou (3):
dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU
drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali
arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU
.../bindings/display/msm/dpu-common.yaml | 3 +-
.../bindings/display/msm/qcom,kaanapali-mdss.yaml | 4 ++-
.../bindings/display/msm/qcom,msm8998-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,qcm2290-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sc7180-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sc7280-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sc8180x-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sdm845-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sm6115-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sm6150-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sm7150-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sm8150-dpu.yaml | 3 ++
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 34 ++++++++++++++++++++++
arch/arm64/boot/dts/qcom/kaanapali.dtsi | 4 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 32 ++++++++++++++++++++
15 files changed, 104 insertions(+), 3 deletions(-)
---
base-commit: ddfe51b0a0f5dc9e415cc2c8ad8db17532dd426b
change-id: 20260720-msm_gdsc2-cb9230027a2d
Best regards,
--
Yongxing Mou <yongxing.mou@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU 2026-11-09 8:36 [PATCH v5 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali Yongxing Mou @ 2026-11-09 8:36 ` Yongxing Mou 2026-11-09 12:25 ` Krzysztof Kozlowski 2026-11-09 8:36 ` [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali Yongxing Mou 2026-11-09 8:36 ` [PATCH v5 3/3] arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU Yongxing Mou 2 siblings, 1 reply; 6+ messages in thread From: Yongxing Mou @ 2026-11-09 8:36 UTC (permalink / raw) To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krishna Manikandan, Abel Vesa, Yuanjie Yang, Bjorn Andersson, Konrad Dybcio Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel, Yongxing Mou, Joonhoe Kim Kaanapali (SM8850) has two display GDSCs. CORE_GDSC supplies shared MDSS hardware and most of the DPU, while INT2 GDSC supplies the VIG2/VIG3/DMA5 source pipes. Without INT2 GDSC, these source pipes remain inaccessible. Describe CORE and INT2 as power domains of the DPU device, matching the hardware partitioning. INT2 only supplies DPU-local source pipes, while CORE also remains attached to the parent MDSS device because it supplies shared MDSS hardware. DPU performance-state votes on CORE are propagated through the genpd hierarchy to its parent MMCX domain. Keep the widest valid power-domain constraint in dpu-common.yaml and narrow it in each platform-specific binding. Require two domains and their names for Kaanapali, while retaining the existing single-domain constraint for all other DPU platforms. Repeat power-domains in qcom,sm8650-dpu.yaml because dtschema requires power-domain-names to have a power-domains sibling in the same file. Tested-by: Joonhoe Kim <26rote@gmail.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> --- .../bindings/display/msm/dpu-common.yaml | 3 +- .../bindings/display/msm/qcom,kaanapali-mdss.yaml | 4 ++- .../bindings/display/msm/qcom,msm8998-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,qcm2290-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sc7180-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sc7280-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sc8180x-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sdm845-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sm6115-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sm6150-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sm7150-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sm8150-dpu.yaml | 3 ++ .../bindings/display/msm/qcom,sm8650-dpu.yaml | 34 ++++++++++++++++++++++ 13 files changed, 69 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml index 3f953aa5e6949..c67199011f263 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml @@ -26,7 +26,8 @@ properties: maxItems: 1 power-domains: - maxItems: 1 + minItems: 1 + maxItems: 2 operating-points-v2: true opp-table: diff --git a/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml index 9f935defd6b12..6d6391970d6b6 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml @@ -125,7 +125,9 @@ examples: operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd RPMHPD_MMCX>; + power-domains = <&mdss_gdsc>, + <&mdss_int2_gdsc>; + power-domain-names = "core", "int2"; ports { #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml index d5a64c8a921f1..bded43a34b87d 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml @@ -15,6 +15,9 @@ properties: compatible: const: qcom,msm8998-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml index 034d3df8d2470..6c1476a0faaf5 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml @@ -19,6 +19,9 @@ properties: - const: qcom,shikra-dpu - const: qcom,qcm2290-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml index 8137618237ce7..3fa0f02f44892 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml @@ -19,6 +19,9 @@ properties: - qcom,sm6350-dpu - qcom,sm6375-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml index df9ec15ad6c3c..7703d9b017cfc 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml @@ -24,6 +24,9 @@ properties: - qcom,sm8450-dpu - qcom,sm8550-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml index a411126708b80..8e10f9e0d1769 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml @@ -15,6 +15,9 @@ properties: compatible: const: qcom,sc8180x-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml index dc11fd421a27f..9dafe1d827e13 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml @@ -17,6 +17,9 @@ properties: - qcom,sdm670-dpu - qcom,sdm845-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml index 510eb6c193649..173c2f034241c 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml @@ -15,6 +15,9 @@ properties: compatible: const: qcom,sm6115-dpu + power-domains: + maxItems: 1 + reg: items: - description: MDP register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml index 8cbf99f9fcba5..b8344ff8895ac 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml @@ -16,6 +16,9 @@ properties: compatible: const: qcom,sm6150-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml index c79b2d4428003..8e50942f3e1f2 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml @@ -15,6 +15,9 @@ properties: compatible: const: qcom,sm7150-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml index a88d22f30a602..b407bc3994620 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml @@ -17,6 +17,9 @@ properties: - qcom,sm8150-dpu - qcom,sm8250-dpu + power-domains: + maxItems: 1 + reg: items: - description: Address offset and size for mdp register set diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml index aa0cf0ec5b93f..c3bf4e7ca1ffe 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml @@ -54,6 +54,15 @@ properties: - const: core - const: vsync + power-domains: + minItems: 1 + maxItems: 2 + + power-domain-names: + items: + - const: core + - const: int2 + required: - compatible - reg @@ -61,6 +70,31 @@ required: - clocks - clock-names +allOf: + - if: + properties: + compatible: + contains: + const: qcom,kaanapali-dpu + required: + - compatible + then: + properties: + power-domains: + minItems: 2 + + power-domain-names: + minItems: 2 + + required: + - power-domain-names + else: + properties: + power-domains: + maxItems: 1 + + power-domain-names: false + unevaluatedProperties: false examples: -- 2.43.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU 2026-11-09 8:36 ` [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU Yongxing Mou @ 2026-11-09 12:25 ` Krzysztof Kozlowski 0 siblings, 0 replies; 6+ messages in thread From: Krzysztof Kozlowski @ 2026-11-09 12:25 UTC (permalink / raw) To: Yongxing Mou Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krishna Manikandan, Abel Vesa, Yuanjie Yang, Bjorn Andersson, Konrad Dybcio, linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel, Joonhoe Kim On Mon, Nov 09, 2026 at 04:36:35PM +0800, Yongxing Mou wrote: > Kaanapali (SM8850) has two display GDSCs. CORE_GDSC supplies shared > MDSS hardware and most of the DPU, while INT2 GDSC supplies the > VIG2/VIG3/DMA5 source pipes. Without INT2 GDSC, these source pipes > remain inaccessible. > > Describe CORE and INT2 as power domains of the DPU device, matching > the hardware partitioning. INT2 only supplies DPU-local source pipes, > while CORE also remains attached to the parent MDSS device because it > supplies shared MDSS hardware. DPU performance-state votes on CORE are > propagated through the genpd hierarchy to its parent MMCX domain. > > Keep the widest valid power-domain constraint in dpu-common.yaml and > narrow it in each platform-specific binding. Require two domains and > their names for Kaanapali, while retaining the existing single-domain > constraint for all other DPU platforms. > > Repeat power-domains in qcom,sm8650-dpu.yaml because dtschema requires > power-domain-names to have a power-domains sibling in the same file. > > Tested-by: Joonhoe Kim <26rote@gmail.com> Drop Anyway, where did it happen? Nothing in v4, nothing in v3. > Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> > --- > .../bindings/display/msm/dpu-common.yaml | 3 +- > .../bindings/display/msm/qcom,kaanapali-mdss.yaml | 4 ++- > .../bindings/display/msm/qcom,msm8998-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,qcm2290-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sc7180-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sc7280-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sc8180x-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sdm845-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sm6115-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sm6150-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sm7150-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sm8150-dpu.yaml | 3 ++ > .../bindings/display/msm/qcom,sm8650-dpu.yaml | 34 ++++++++++++++++++++++ > 13 files changed, 69 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml > index 3f953aa5e6949..c67199011f263 100644 > --- a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml > +++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml > @@ -26,7 +26,8 @@ properties: > maxItems: 1 > > power-domains: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > > operating-points-v2: true > opp-table: > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml > index 9f935defd6b12..6d6391970d6b6 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml > @@ -125,7 +125,9 @@ examples: > > operating-points-v2 = <&mdp_opp_table>; > > - power-domains = <&rpmhpd RPMHPD_MMCX>; > + power-domains = <&mdss_gdsc>, > + <&mdss_int2_gdsc>; > + power-domain-names = "core", "int2"; > > ports { > #address-cells = <1>; > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml > index d5a64c8a921f1..bded43a34b87d 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml > @@ -15,6 +15,9 @@ properties: > compatible: > const: qcom,msm8998-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml > index 034d3df8d2470..6c1476a0faaf5 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml > @@ -19,6 +19,9 @@ properties: > - const: qcom,shikra-dpu > - const: qcom,qcm2290-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml > index 8137618237ce7..3fa0f02f44892 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml > @@ -19,6 +19,9 @@ properties: > - qcom,sm6350-dpu > - qcom,sm6375-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml > index df9ec15ad6c3c..7703d9b017cfc 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml > @@ -24,6 +24,9 @@ properties: > - qcom,sm8450-dpu > - qcom,sm8550-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml > index a411126708b80..8e10f9e0d1769 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml > @@ -15,6 +15,9 @@ properties: > compatible: > const: qcom,sc8180x-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml > index dc11fd421a27f..9dafe1d827e13 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml > @@ -17,6 +17,9 @@ properties: > - qcom,sdm670-dpu > - qcom,sdm845-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml > index 510eb6c193649..173c2f034241c 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml > @@ -15,6 +15,9 @@ properties: > compatible: > const: qcom,sm6115-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: MDP register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml > index 8cbf99f9fcba5..b8344ff8895ac 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm6150-dpu.yaml > @@ -16,6 +16,9 @@ properties: > compatible: > const: qcom,sm6150-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml > index c79b2d4428003..8e50942f3e1f2 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm7150-dpu.yaml > @@ -15,6 +15,9 @@ properties: > compatible: > const: qcom,sm7150-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml > index a88d22f30a602..b407bc3994620 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml > @@ -17,6 +17,9 @@ properties: > - qcom,sm8150-dpu > - qcom,sm8250-dpu > > + power-domains: > + maxItems: 1 > + > reg: > items: > - description: Address offset and size for mdp register set > diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml > index aa0cf0ec5b93f..c3bf4e7ca1ffe 100644 > --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml > @@ -54,6 +54,15 @@ properties: > - const: core > - const: vsync > > + power-domains: > + minItems: 1 > + maxItems: 2 > + > + power-domain-names: > + items: > + - const: core > + - const: int2 > + > required: > - compatible > - reg > @@ -61,6 +70,31 @@ required: > - clocks > - clock-names > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: qcom,kaanapali-dpu > + required: > + - compatible Droo required > + then: > + properties: > + power-domains: > + minItems: 2 > + > + power-domain-names: > + minItems: 2 How did you resolve my previous comment? > + > + required: > + - power-domain-names Why adding this? Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali 2026-11-09 8:36 [PATCH v5 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali Yongxing Mou 2026-11-09 8:36 ` [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU Yongxing Mou @ 2026-11-09 8:36 ` Yongxing Mou 2026-11-09 12:26 ` Krzysztof Kozlowski 2026-11-09 8:36 ` [PATCH v5 3/3] arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU Yongxing Mou 2 siblings, 1 reply; 6+ messages in thread From: Yongxing Mou @ 2026-11-09 8:36 UTC (permalink / raw) To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krishna Manikandan, Abel Vesa, Yuanjie Yang, Bjorn Andersson, Konrad Dybcio Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel, Yongxing Mou, Dmitry Baryshkov, Joonhoe Kim Kaanapali's DPU is supplied by both CORE and INT2 GDSCs. The power-domain core only auto-attaches a single domain; with multiple domains the device is left unattached, so both domains must be attached explicitly. The DPU OPP table also needs to continue controlling the MMCX performance state. Mark CORE as the required OPP domain so its vote is propagated through the genpd hierarchy to MMCX. INT2 has no OPP of its own and is attached as a regular runtime-PM supplier. Platforms with a single power domain remain unaffected and continue to use the existing automatic attachment. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Tested-by: Joonhoe Kim <26rote@gmail.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index da3556eb6ecc2..502e50ea5acac 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -12,6 +12,7 @@ #include <linux/debugfs.h> #include <linux/dma-buf.h> #include <linux/of_irq.h> +#include <linux/pm_domain.h> #include <linux/pm_opp.h> #include <drm/drm_crtc.h> @@ -1376,6 +1377,33 @@ static int dpu_kms_mmap_dpu(struct dpu_kms *dpu_kms) return 0; } +static int dpu_kms_attach_power_domains(struct device *dev) +{ + static const char * const core_names[] = { "core" }; + static const char * const int2_names[] = { "int2" }; + const struct dev_pm_domain_attach_data core_pd = { + .pd_names = core_names, + .num_pd_names = ARRAY_SIZE(core_names), + .pd_flags = PD_FLAG_REQUIRED_OPP, + }; + const struct dev_pm_domain_attach_data int2_pd = { + .pd_names = int2_names, + .num_pd_names = ARRAY_SIZE(int2_names), + }; + struct dev_pm_domain_list *core_list, *int2_list; + int ret; + + if (of_count_phandle_with_args(dev->of_node, "power-domains", + "#power-domain-cells") <= 1) + return 0; + + ret = devm_pm_domain_attach_list(dev, &core_pd, &core_list); + if (ret < 0) + return ret; + + return devm_pm_domain_attach_list(dev, &int2_pd, &int2_list); +} + static int dpu_dev_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1392,6 +1420,10 @@ static int dpu_dev_probe(struct platform_device *pdev) dpu_kms->pdev = pdev; + ret = dpu_kms_attach_power_domains(dev); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to attach power domains\n"); + ret = devm_pm_opp_set_clkname(dev, "core"); if (ret) return ret; -- 2.43.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali 2026-11-09 8:36 ` [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali Yongxing Mou @ 2026-11-09 12:26 ` Krzysztof Kozlowski 0 siblings, 0 replies; 6+ messages in thread From: Krzysztof Kozlowski @ 2026-11-09 12:26 UTC (permalink / raw) To: Yongxing Mou Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krishna Manikandan, Abel Vesa, Yuanjie Yang, Bjorn Andersson, Konrad Dybcio, linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel, Dmitry Baryshkov, Joonhoe Kim On Mon, Nov 09, 2026 at 04:36:36PM +0800, Yongxing Mou wrote: > Kaanapali's DPU is supplied by both CORE and INT2 GDSCs. The > power-domain core only auto-attaches a single domain; with multiple > domains the device is left unattached, so both domains must be attached > explicitly. > > The DPU OPP table also needs to continue controlling the MMCX > performance state. Mark CORE as the required OPP domain so its vote is > propagated through the genpd hierarchy to MMCX. INT2 has no OPP of its > own and is attached as a regular runtime-PM supplier. > > Platforms with a single power domain remain unaffected and continue to > use the existing automatic attachment. > > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> > Tested-by: Joonhoe Kim <26rote@gmail.com> Where? No tests were at v3 and v4. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v5 3/3] arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU 2026-11-09 8:36 [PATCH v5 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali Yongxing Mou 2026-11-09 8:36 ` [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU Yongxing Mou 2026-11-09 8:36 ` [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali Yongxing Mou @ 2026-11-09 8:36 ` Yongxing Mou 2 siblings, 0 replies; 6+ messages in thread From: Yongxing Mou @ 2026-11-09 8:36 UTC (permalink / raw) To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Krishna Manikandan, Abel Vesa, Yuanjie Yang, Bjorn Andersson, Konrad Dybcio Cc: linux-arm-msm, dri-devel, freedreno, devicetree, linux-kernel, Yongxing Mou, Abel Vesa, Konrad Dybcio, Joonhoe Kim The INT2 GDSC on Kaanapali (SM8850) powers the VIG2, VIG3 and DMA5 source pipes. Without enabling it, these pipes remain inaccessible. The DPU is supplied by both CORE and INT2, so describe both GDSCs as its power domains rather than attaching the DPU directly to their parent MMCX domain. Keep CORE attached to the parent MDSS device because it also supplies shared MDSS hardware outside the DPU. Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Joonhoe Kim <26rote@gmail.com> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/kaanapali.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/kaanapali.dtsi b/arch/arm64/boot/dts/qcom/kaanapali.dtsi index e48a179d0722..98d367b9dac7 100644 --- a/arch/arm64/boot/dts/qcom/kaanapali.dtsi +++ b/arch/arm64/boot/dts/qcom/kaanapali.dtsi @@ -3674,7 +3674,9 @@ mdss_mdp: display-controller@9801000 { operating-points-v2 = <&mdp_opp_table>; - power-domains = <&rpmhpd RPMHPD_MMCX>; + power-domains = <&dispcc DISP_CC_MDSS_CORE_GDSC>, + <&dispcc DISP_CC_MDSS_CORE_INT2_GDSC>; + power-domain-names = "core", "int2"; ports { #address-cells = <1>; -- 2.43.0 ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2026-11-09 12:26 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2026-11-09 8:36 [PATCH v5 0/3] drm/msm/dpu: Add INT2 GDSC power domain support for Kaanapali Yongxing Mou 2026-11-09 8:36 ` [PATCH v5 1/3] dt-bindings: display: msm: Add INT2 GDSC to Kaanapali DPU Yongxing Mou 2026-11-09 12:25 ` Krzysztof Kozlowski 2026-11-09 8:36 ` [PATCH v5 2/3] drm/msm/dpu: Attach CORE and INT2 power domains on Kaanapali Yongxing Mou 2026-11-09 12:26 ` Krzysztof Kozlowski 2026-11-09 8:36 ` [PATCH v5 3/3] arm64: dts: qcom: Add INT2 GDSC to Kaanapali DPU Yongxing Mou
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