* [PATCH v2] drm/panel: boe-bf060y8m-aj0: Correct display pixel clock
@ 2026-11-08 21:51 Dang Huynh
0 siblings, 0 replies; only message in thread
From: Dang Huynh @ 2026-11-08 21:51 UTC (permalink / raw)
To: Neil Armstrong, Jessica Zhang, Maarten Lankhorst, Maxime Ripard,
Thomas Zimmermann, David Airlie, Simona Vetter, Sam Ravnborg,
AngeloGioacchino Del Regno
Cc: dri-devel, linux-kernel, phone-devel, Dang Huynh
The driver has been using the wrong pixel clock ever since it's
submission.
The panel is 60Hz, but the mainline driver ran at 165268 Hz
which is 61Hz and the following formula can confirm this:
(1080 + 36 + 24 + 96) * (2160 + 16 + 1 + 15) * 61 / 1000
This causes the touchscreen on the F(x)tec Pro1x to show heavy
signs of ghost touches, making the touchscreen unusable for
anything practical.
After the pixel clock is corrected, the touchscreen no longer show
any sign of ghost touches.
Fixes: a19125a28112 ("drm/panel: Add BOE BF060Y8M-AJ0 5.99" AMOLED panel driver")
Signed-off-by: Dang Huynh <dang.huynh@mainlining.org>
---
Changes in v2:
- The mentioned "panel" and "ghost touch" is the display unit on the F(x)tec Pro1x. Whoops!
- Link to v1: https://patch.msgid.link/20261109-pro1x-display-pixelclock-v1-1-c81453fab5e4@mainlining.org
---
drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
index 84c21c62a43e..b1f428e0808d 100644
--- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
+++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
@@ -168,7 +168,7 @@ static int boe_bf060y8m_aj0_unprepare(struct drm_panel *panel)
}
static const struct drm_display_mode boe_bf060y8m_aj0_mode = {
- .clock = 165268,
+ .clock = (1080 + 36 + 24 + 96) * (2160 + 16 + 1 + 15) * 60 / 1000,
.hdisplay = 1080,
.hsync_start = 1080 + 36,
.hsync_end = 1080 + 36 + 24,
---
base-commit: ddfe51b0a0f5dc9e415cc2c8ad8db17532dd426b
change-id: 20261109-pro1x-display-pixelclock-8b00f09972fd
Best regards,
--
Dang Huynh <dang.huynh@mainlining.org>
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