[PATCH] dt-bindings: clock: Convert hisilicon,hi3519-crg to DT schema

[PATCH] dt-bindings: clock: Convert hisilicon,hi3519-crg to DT schema

[Rob Herring (Arm)]

Convert the HiSilicon CRG binding to DT schema format.

The allowed compatibles was not very accurate, so update them to
match the users. Drop the hi3516cv300 compatibles as the platform
has no DT and only a few drivers (pending removal) upstream.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 .../devicetree/bindings/clock/hisi-crg.txt    | 50 ---------------
 .../bindings/clock/hisilicon,hi3519-crg.yaml  | 61 +++++++++++++++++++
 2 files changed, 61 insertions(+), 50 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/hisi-crg.txt
 create mode 100644 Documentation/devicetree/bindings/clock/hisilicon,hi3519-crg.yaml

diff --git a/Documentation/devicetree/bindings/clock/hisi-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt
deleted file mode 100644
index cc60b3d423f3..000000000000
--- a/Documentation/devicetree/bindings/clock/hisi-crg.txt
+++ /dev/null
@@ -1,50 +0,0 @@
-* HiSilicon Clock and Reset Generator(CRG)
-
-The CRG module provides clock and reset signals to various
-modules within the SoC.
-
-This binding uses the following bindings:
-    Documentation/devicetree/bindings/clock/clock-bindings.txt
-    Documentation/devicetree/bindings/reset/reset.txt
-
-Required Properties:
-
-- compatible: should be one of the following.
-  - "hisilicon,hi3516cv300-crg"
-  - "hisilicon,hi3516cv300-sysctrl"
-  - "hisilicon,hi3519-crg"
-  - "hisilicon,hi3798cv200-crg"
-  - "hisilicon,hi3798cv200-sysctrl"
-
-- reg: physical base address of the controller and length of memory mapped
-  region.
-
-- #clock-cells: should be 1.
-
-Each clock is assigned an identifier and client nodes use this identifier
-to specify the clock which they consume.
-
-All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>.
-
-- #reset-cells: should be 2.
-
-A reset signal can be controlled by writing a bit register in the CRG module.
-The reset specifier consists of two cells. The first cell represents the
-register offset relative to the base address. The second cell represents the
-bit index in the register.
-
-Example: CRG nodes
-CRG: clock-reset-controller@12010000 {
-	compatible = "hisilicon,hi3519-crg";
-	reg = <0x12010000 0x10000>;
-	#clock-cells = <1>;
-	#reset-cells = <2>;
-};
-
-Example: consumer nodes
-i2c0: i2c@12110000 {
-	compatible = "hisilicon,hi3519-i2c";
-	reg = <0x12110000 0x1000>;
-	clocks = <&CRG HI3519_I2C0_RST>;
-	resets = <&CRG 0xe4 0>;
-};
diff --git a/Documentation/devicetree/bindings/clock/hisilicon,hi3519-crg.yaml b/Documentation/devicetree/bindings/clock/hisilicon,hi3519-crg.yaml
new file mode 100644
index 000000000000..c0b7a5521fe3
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/hisilicon,hi3519-crg.yaml
@@ -0,0 +1,61 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/hisilicon,hi3519-crg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon HI3519/HI3798CV200 Clock and Reset Generator (CRG)
+
+maintainers:
+  - Wei Xu <xuwei5@hisilicon.com>
+
+description:
+  The CRG module provides clock and reset signals to various modules within the
+  SoC.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: hisilicon,hi3798cv200-crg
+          - const: syscon
+          - const: simple-mfd
+      - items:
+          - const: hisilicon,hi3798cv200-sysctrl
+          - const: syscon
+      - items:
+          - const: hisilicon,hi3519-crg
+
+  reg:
+    maxItems: 1
+
+  '#clock-cells':
+    description: >
+      The identifiers for the cells can be found in:
+
+        dt-bindings/clock/hi3519-clock.h
+        dt-bindings/clock/histb-clock.h
+    const: 1
+
+  '#reset-cells':
+    description:
+      A reset signal can be controlled by writing a bit register in the CRG
+      module. The reset specifier consists of two cells. The first cell
+      represents the register offset relative to the base address. The second
+      cell represents the bit index in the register.
+    const: 2
+
+  reset-controller:
+    type: object
+    properties:
+      compatible:
+        const: ti,syscon-reset
+
+    additionalProperties: true
+
+required:
+  - compatible
+  - reg
+  - '#clock-cells'
+  - '#reset-cells'
+
+additionalProperties: false
-- 
2.53.0