From: Fenghua Yu <fenghuay@nvidia.com>
To: Reinette Chatre <reinette.chatre@intel.com>,
Tony Luck <tony.luck@intel.com>, Ben Horgan <ben.horgan@arm.com>,
James Morse <james.morse@arm.com>, Will Deacon <will@kernel.org>,
Dave Martin <Dave.Martin@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Shaopeng Tan <tan.shaopeng@fujitsu.com>,
Chen Yu <yu.c.chen@intel.com>, Babu Moger <babu.moger@amd.com>,
Drew Fustini <fustini@kernel.org>,
Vikram Sethi <vsethi@nvidia.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
Newton Liu <newtonl@nvidia.com>,
Richard Cheng <icheng@nvidia.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Fenghua Yu <fenghuay@nvidia.com>
Subject: [PATCH RFC v1 3/6] arm_mpam: resctrl: track MBW max hard-limit in config
Date: Mon, 9 Nov 2026 13:29:34 -0800 [thread overview]
Message-ID: <20261109212937.1409570-4-fenghuay@nvidia.com> (raw)
In-Reply-To: <20261109212937.1409570-1-fenghuay@nvidia.com>
Once userspace sets MB_MAXHLM schemata, the driver must program the
HARDLIM bit in MPAMCFG_MBW_MAX. Without tracking the per-domain hard-
limit state in mpam_config, bandwidth reprogramming would ignore the
schemata and leave hard limits unchanged in hardware.
Add mbw_max_hardlim to mpam_config and set MPAMCFG_MBW_MAX bit 31
(HARDLIM) when reprogramming MBW_MAX on hardware that supports hard
limiting.
Signed-off-by: Fenghua Yu <fenghuay@nvidia.com>
---
drivers/resctrl/mpam_devices.c | 27 ++++++++++++++++++++++++---
drivers/resctrl/mpam_internal.h | 1 +
2 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index 1e56e8f3858e..7dee6617b134 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -1664,10 +1664,29 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
}
if (mpam_has_feature(mpam_feat_mbw_max, rprops)) {
- if (mpam_has_feature(mpam_feat_mbw_max, cfg))
- mpam_write_partsel_reg(msc, MBW_MAX, cfg->mbw_max);
- else
+ if (mpam_has_feature(mpam_feat_mbw_max, cfg) ||
+ mpam_has_feature(mpam_feat_mbw_max_hardlim_rw, cfg)) {
+ u32 mbw_val;
+
+ /*
+ * HARDLIM shares MPAMCFG_MBW_MAX with the bandwidth
+ * field. A hard-limit update does not program
+ * bandwidth: the shadow value is not live until an
+ * MB write, and reset leaves the register at
+ * MPAMCFG_MBW_MAX_MAX. Keep that programmed value.
+ */
+ if (mpam_has_feature(mpam_feat_mbw_max, cfg))
+ mbw_val = cfg->mbw_max;
+ else
+ mbw_val = MPAMCFG_MBW_MAX_MAX;
+
+ if (mpam_has_feature(mpam_feat_mbw_max_hardlim_rw, cfg) &&
+ cfg->mbw_max_hardlim)
+ mbw_val |= MPAMCFG_MBW_MAX_HARDLIM;
+ mpam_write_partsel_reg(msc, MBW_MAX, mbw_val);
+ } else {
mpam_write_partsel_reg(msc, MBW_MAX, MPAMCFG_MBW_MAX_MAX);
+ }
}
if (mpam_has_feature(mpam_feat_mbw_prop, rprops))
@@ -2986,6 +3005,8 @@ static bool mpam_update_config(struct mpam_config *cfg,
maybe_update_config(cfg, mpam_feat_cpor_part, newcfg, cpbm, has_changes);
maybe_update_config(cfg, mpam_feat_mbw_part, newcfg, mbw_pbm, has_changes);
maybe_update_config(cfg, mpam_feat_mbw_max, newcfg, mbw_max, has_changes);
+ maybe_update_config(cfg, mpam_feat_mbw_max_hardlim_rw, newcfg,
+ mbw_max_hardlim, has_changes);
return has_changes;
}
diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
index 6be32b2cb0ab..59d04cb663da 100644
--- a/drivers/resctrl/mpam_internal.h
+++ b/drivers/resctrl/mpam_internal.h
@@ -324,6 +324,7 @@ struct mpam_config {
u32 cpbm;
u32 mbw_pbm;
u16 mbw_max;
+ bool mbw_max_hardlim;
struct mpam_garbage garbage;
};
--
2.53.0
next prev parent reply other threads:[~2026-11-09 21:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-09 21:29 [PATCH RFC v1 0/6] arm_mpam,resctrl: expose MPAM MBW_MAX hard limit Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 1/6] resctrl: wire MB_MAXHLM schemata parsing and group setup Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 2/6] arm_mpam: resctrl: probe MPAMF_MBW_IDR MAX_LIM and hardlim_rw Fenghua Yu
2026-11-09 21:29 ` Fenghua Yu [this message]
2026-11-09 21:29 ` [PATCH RFC v1 4/6] arm_mpam: resctrl: add MAXHLM control on the MBA resource Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 5/6] arm_mpam: Add MB_MAXHLM_NODE and Node scope Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 6/6] Documentation: resctrl: document MB_MAXHLM for MPAM MBA Fenghua Yu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261109212937.1409570-4-fenghuay@nvidia.com \
--to=fenghuay@nvidia.com \
--cc=Dave.Martin@arm.com \
--cc=babu.moger@amd.com \
--cc=ben.horgan@arm.com \
--cc=catalin.marinas@arm.com \
--cc=fustini@kernel.org \
--cc=icheng@nvidia.com \
--cc=james.morse@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=newtonl@nvidia.com \
--cc=reinette.chatre@intel.com \
--cc=sdonthineni@nvidia.com \
--cc=tan.shaopeng@fujitsu.com \
--cc=tony.luck@intel.com \
--cc=vsethi@nvidia.com \
--cc=will@kernel.org \
--cc=yu.c.chen@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®