From: Fenghua Yu <fenghuay@nvidia.com>
To: Reinette Chatre <reinette.chatre@intel.com>,
Tony Luck <tony.luck@intel.com>, Ben Horgan <ben.horgan@arm.com>,
James Morse <james.morse@arm.com>, Will Deacon <will@kernel.org>,
Dave Martin <Dave.Martin@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Shaopeng Tan <tan.shaopeng@fujitsu.com>,
Chen Yu <yu.c.chen@intel.com>, Babu Moger <babu.moger@amd.com>,
Drew Fustini <fustini@kernel.org>,
Vikram Sethi <vsethi@nvidia.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
Newton Liu <newtonl@nvidia.com>,
Richard Cheng <icheng@nvidia.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Fenghua Yu <fenghuay@nvidia.com>
Subject: [PATCH RFC v1 4/6] arm_mpam: resctrl: add MAXHLM control on the MBA resource
Date: Mon, 9 Nov 2026 13:29:35 -0800 [thread overview]
Message-ID: <20261109212937.1409570-5-fenghuay@nvidia.com> (raw)
In-Reply-To: <20261109212937.1409570-1-fenghuay@nvidia.com>
MB_MAXHLM toggles the HARDLIM field of the same MPAM bandwidth
hardware as MBA. Create that control on the MBA resource when
mpam_feat_mbw_max_hardlim_rw is present, and read and write it
through resctrl_arch_get_config() and resctrl_arch_update_one().
Signed-off-by: Fenghua Yu <fenghuay@nvidia.com>
---
drivers/resctrl/mpam_resctrl.c | 154 ++++++++++++++++++++++++++-------
1 file changed, 121 insertions(+), 33 deletions(-)
diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c
index 8a169676c4ac..ea1fb7fc7e01 100644
--- a/drivers/resctrl/mpam_resctrl.c
+++ b/drivers/resctrl/mpam_resctrl.c
@@ -1266,20 +1266,95 @@ void resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *
resctrl_arch_reset_cntr(r, d, closid, rmid, cntr_id, evtid);
}
+static void _mpam_resctrl_ctrl_init_mba(struct mpam_resctrl_ctrl *mpam_ctrl,
+ struct mpam_props *cprops,
+ enum resctrl_ctrl_name name)
+{
+ mpam_ctrl->r_ctrl.type = RESCTRL_CTRL_SCALAR;
+ mpam_ctrl->r_ctrl.name = name;
+ INIT_LIST_HEAD_RCU(&mpam_ctrl->r_ctrl.domains);
+
+ /*
+ * emulated_by is left empty so legacy and native mode expose
+ * the same schemata line. A memory-class MSC is node-scoped,
+ * so that line is MB_NODE. A cache MSC keeps the MB line.
+ */
+ INIT_LIST_HEAD(&mpam_ctrl->r_ctrl.emulated_by);
+
+ mpam_ctrl->r_ctrl.scalar.min = get_mba_min(cprops);
+ mpam_ctrl->r_ctrl.scalar.max = MAX_MBA_BW;
+ mpam_ctrl->r_ctrl.scalar.reset_val = MAX_MBA_BW;
+ mpam_ctrl->r_ctrl.scalar.gran = get_mba_granularity(cprops);
+
+ __set_bit(RESCTRL_SCALAR_FLAG_LINEAR, mpam_ctrl->r_ctrl.scalar.flags);
+}
+
+static int mpam_resctrl_ctrl_init_mba(struct rdt_resource *r,
+ struct mpam_props *cprops)
+{
+ struct mpam_resctrl_ctrl *mpam_ctrl, *ctrl_maxhlm = NULL;
+ struct mpam_resctrl_res *res;
+ struct mpam_class *class;
+
+ mpam_ctrl = kzalloc_obj(*mpam_ctrl);
+ if (!mpam_ctrl)
+ return -ENOMEM;
+
+ r->ctrl_scope = RESCTRL_L3_CACHE;
+ r->ctrl_mode = RESCTRL_CTRL_MODE_LEGACY;
+ res = container_of(r, struct mpam_resctrl_res, resctrl_res);
+ class = res->class;
+ if (mpam_class_memory(class)) {
+ _mpam_resctrl_ctrl_init_mba(mpam_ctrl, cprops,
+ RESCTRL_CTRL_NAME_NODE);
+ } else {
+ _mpam_resctrl_ctrl_init_mba(mpam_ctrl, cprops,
+ RESCTRL_CTRL_NAME_DEF);
+ }
+
+ /*
+ * Allocate the hard-limit control before either control is
+ * linked. mpam_resctrl_setup() does not free r->controls when
+ * this fails.
+ */
+ if (mpam_has_feature(mpam_feat_mbw_max_hardlim_rw, cprops)) {
+ ctrl_maxhlm = kzalloc_obj(*ctrl_maxhlm);
+ if (!ctrl_maxhlm) {
+ kfree(mpam_ctrl);
+ return -ENOMEM;
+ }
+
+ _mpam_resctrl_ctrl_init_mba(ctrl_maxhlm, cprops,
+ RESCTRL_CTRL_NAME_MAXHLM);
+ }
+
+ /*
+ * Link the bandwidth control first. list_add() inserts at the
+ * head, so a combined schemata write programs HARDLIM before
+ * the bandwidth field.
+ */
+ list_add(&mpam_ctrl->r_ctrl.entry, &r->controls);
+ if (ctrl_maxhlm)
+ list_add(&ctrl_maxhlm->r_ctrl.entry, &r->controls);
+
+ return 0;
+}
+
static int mpam_resctrl_control_init(struct mpam_resctrl_res *res)
{
struct mpam_class *class = res->class;
struct mpam_props *cprops = &class->props;
struct rdt_resource *r = &res->resctrl_res;
struct mpam_resctrl_ctrl *mpam_ctrl;
-
- mpam_ctrl = kzalloc_obj(*mpam_ctrl);
- if (!mpam_ctrl)
- return -ENOMEM;
+ int ret = 0;
switch (r->rid) {
case RDT_RESOURCE_L2:
case RDT_RESOURCE_L3:
+ mpam_ctrl = kzalloc_obj(*mpam_ctrl);
+ if (!mpam_ctrl)
+ return -ENOMEM;
+
mpam_ctrl->r_ctrl.type = RESCTRL_CTRL_BITMAP;
mpam_ctrl->r_ctrl.name = RESCTRL_CTRL_NAME_DEF;
INIT_LIST_HEAD_RCU(&mpam_ctrl->r_ctrl.domains);
@@ -1310,29 +1385,11 @@ static int mpam_resctrl_control_init(struct mpam_resctrl_res *res)
r->alloc_capable = true;
break;
case RDT_RESOURCE_MBA:
- r->ctrl_scope = RESCTRL_L3_CACHE;
- /*
- * control_mode stays legacy. emulated_by is left empty so
- * legacy and native mode expose the same schemata line.
- * A memory-class MSC is node-scoped, so that line is
- * MB_NODE. A cache MSC keeps the MB line.
- */
- r->ctrl_mode = RESCTRL_CTRL_MODE_LEGACY;
- mpam_ctrl->r_ctrl.type = RESCTRL_CTRL_SCALAR;
- if (mpam_class_memory(class))
- mpam_ctrl->r_ctrl.name = RESCTRL_CTRL_NAME_NODE;
- else
- mpam_ctrl->r_ctrl.name = RESCTRL_CTRL_NAME_DEF;
- INIT_LIST_HEAD_RCU(&mpam_ctrl->r_ctrl.domains);
- INIT_LIST_HEAD(&mpam_ctrl->r_ctrl.emulated_by);
+ ret = mpam_resctrl_ctrl_init_mba(r, cprops);
+ if (ret)
+ return ret;
r->bw_throttle_mode = THREAD_THROTTLE_UNDEFINED;
- __set_bit(RESCTRL_SCALAR_FLAG_LINEAR, mpam_ctrl->r_ctrl.scalar.flags);
- mpam_ctrl->r_ctrl.scalar.min = get_mba_min(cprops);
- mpam_ctrl->r_ctrl.scalar.max = MAX_MBA_BW;
- mpam_ctrl->r_ctrl.scalar.reset_val = MAX_MBA_BW;
- mpam_ctrl->r_ctrl.scalar.gran = get_mba_granularity(cprops);
- list_add(&mpam_ctrl->r_ctrl.entry, &r->controls);
r->name = "MB";
r->alloc_capable = true;
@@ -1524,11 +1581,19 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct resctrl_ctrl *ctrl,
configured_by = mpam_feat_cpor_part;
break;
case RDT_RESOURCE_MBA:
- if (mpam_has_feature(mpam_feat_mbw_max, cprops)) {
- configured_by = mpam_feat_mbw_max;
+ switch (ctrl->name) {
+ case RESCTRL_CTRL_NAME_DEF:
+ case RESCTRL_CTRL_NAME_NODE:
+ if (mpam_has_feature(mpam_feat_mbw_max, cprops))
+ configured_by = mpam_feat_mbw_max;
+ break;
+ case RESCTRL_CTRL_NAME_MAXHLM:
+ configured_by = mpam_feat_mbw_max_hardlim_rw;
+ break;
+ default:
break;
}
- fallthrough;
+ break;
default:
return resctrl_get_default_ctrlval(ctrl);
}
@@ -1542,6 +1607,8 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct resctrl_ctrl *ctrl,
return cfg->cpbm;
case mpam_feat_mbw_max:
return mbw_max_to_percent(cfg->mbw_max, cprops);
+ case mpam_feat_mbw_max_hardlim_rw:
+ return cfg->mbw_max_hardlim;
default:
return resctrl_get_default_ctrlval(ctrl);
}
@@ -1594,12 +1661,33 @@ int resctrl_arch_update_one(struct rdt_resource *r, struct resctrl_ctrl *ctrl,
mpam_set_feature(mpam_feat_cpor_part, &cfg);
break;
case RDT_RESOURCE_MBA:
- if (mpam_has_feature(mpam_feat_mbw_max, cprops)) {
- cfg.mbw_max = percent_to_mbw_max(cfg_val, cprops);
- mpam_set_feature(mpam_feat_mbw_max, &cfg);
- break;
+ switch (ctrl->name) {
+ case RESCTRL_CTRL_NAME_DEF:
+ case RESCTRL_CTRL_NAME_NODE:
+ if (mpam_has_feature(mpam_feat_mbw_max, cprops)) {
+ cfg.mbw_max = percent_to_mbw_max(cfg_val, cprops);
+ mpam_set_feature(mpam_feat_mbw_max, &cfg);
+ break;
+ }
+ return -EINVAL;
+ case RESCTRL_CTRL_NAME_MAXHLM:
+ if (mpam_has_feature(mpam_feat_mbw_max_hardlim_rw, cprops) &&
+ mpam_has_feature(mpam_feat_mbw_max, cprops)) {
+ /*
+ * Submit HARDLIM only. Marking mbw_max here
+ * would program the shadow bandwidth into the
+ * same register and replace the live value.
+ * A previous MB write is already in cfg.
+ */
+ cfg.mbw_max_hardlim = cfg_val != 0;
+ mpam_set_feature(mpam_feat_mbw_max_hardlim_rw, &cfg);
+ break;
+ }
+ return -EINVAL;
+ default:
+ return -EINVAL;
}
- fallthrough;
+ break;
default:
return -EINVAL;
}
--
2.53.0
next prev parent reply other threads:[~2026-11-09 21:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-09 21:29 [PATCH RFC v1 0/6] arm_mpam,resctrl: expose MPAM MBW_MAX hard limit Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 1/6] resctrl: wire MB_MAXHLM schemata parsing and group setup Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 2/6] arm_mpam: resctrl: probe MPAMF_MBW_IDR MAX_LIM and hardlim_rw Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 3/6] arm_mpam: resctrl: track MBW max hard-limit in config Fenghua Yu
2026-11-09 21:29 ` Fenghua Yu [this message]
2026-11-09 21:29 ` [PATCH RFC v1 5/6] arm_mpam: Add MB_MAXHLM_NODE and Node scope Fenghua Yu
2026-11-09 21:29 ` [PATCH RFC v1 6/6] Documentation: resctrl: document MB_MAXHLM for MPAM MBA Fenghua Yu
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