From: Conor Dooley <conor@kernel.org>
To: Xincheng Ji <jixincheng@ultrarisc.com>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>, Andrew Lunn <andrew@lunn.ch>,
Jia Wang <wangjia@ultrarisc.com>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
linux-riscv@lists.infradead.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v7 0/7] riscv: Add device tree support for UltraRISC DP1000
Date: Tue, 10 Nov 2026 18:12:23 +0000 [thread overview]
Message-ID: <20261110-amused-strobe-d6cf2bf24861@spud> (raw)
In-Reply-To: <179427984780.3452989.12543035151641565906.b4-reply@b4>
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On Tue, Nov 10, 2026 at 11:04:07AM +0800, Xincheng Ji wrote:
> Hi Conor,
>
> Jia has left UltraRISC, but the platform maintenance handover was
> unfortunately missed. I would like to take over maintenance of the
> UltraRISC platform and will send a MAINTAINERS patch adding myself.
> The existing repository URL will remain unchanged.
>
> For this series, yes, I was hoping you could pick it up while we
> complete the handover. Would that be possible?
I suppose I can. Send a new version with your name instead of Jia, and
add my git tree to the entry for now:
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
Cheers,
Conor.
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prev parent reply other threads:[~2026-11-10 18:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-25 12:24 Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 1/7] dt-bindings: vendor-prefixes: Add shenrongda Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 2/7] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 3/7] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 4/7] dt-bindings: timer: Add UltraRISC DP1000 CLINT Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 5/7] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 6/7] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Xincheng Ji via B4 Relay
2026-10-25 12:24 ` [PATCH v7 7/7] riscv: dts: ultrarisc: Add Milk-V Titan " Xincheng Ji via B4 Relay
2026-11-09 2:37 ` [PATCH v7 0/7] riscv: Add device tree support for UltraRISC DP1000 Xincheng Ji
2026-11-09 18:51 ` Conor Dooley
2026-11-10 3:04 ` Xincheng Ji
2026-11-10 18:12 ` Conor Dooley [this message]
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