From: Troy Mitchell <troy.mitchell@linux.dev>
To: "Anup Patel" <anup@brainfault.org>,
"Thomas Gleixner" <tglx@kernel.org>,
"Radu Rendec" <radu@rendec.net>, "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Björn Töpel" <bjorn@rivosinc.com>
Cc: Anup Patel <apatel@ventanamicro.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Troy Mitchell <troy.mitchell@linux.dev>
Subject: [PATCH v2 1/2] irqchip/riscv-aplic: Use handle_edge_irq() for edge-triggered MSI sources
Date: Tue, 10 Nov 2026 12:06:29 +0000 [thread overview]
Message-ID: <20261110-aplic-affinity-fix-v2-1-6c143b8b4e8c@linux.dev> (raw)
In-Reply-To: <20261110-aplic-affinity-fix-v2-0-6c143b8b4e8c@linux.dev>
In MSI mode, all APLIC interrupts are handled by handle_fasteoi_irq().
For an edge-triggered source the APLIC forwards each edge as an MSI and
keeps no state after that, so an edge which the CPU side drops is lost.
After an affinity change, the next MSI can arrive on the new CPU while
the previous one is still being handled on the old CPU, and
handle_fasteoi_irq() then drops it.
The fasteoi flow also never calls irq_ack(), which is where IMSIC applies
an affinity change that was deferred while a previous vector move was in
flight. Such a change stays pending, and later affinity changes of the
interrupt only update the pending mask.
Use handle_edge_irq() for edge-triggered sources. It acknowledges the
interrupt before invoking the handler. If the interrupt is still in
progress on the previous target CPU, it either waits for it to complete
or marks it pending so that the handler runs again.
Fixes: ca8df97fe679 ("irqchip/riscv-aplic: Add support for MSI-mode")
Signed-off-by: Troy Mitchell <troy.mitchell@linux.dev>
---
drivers/irqchip/irq-riscv-aplic-msi.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c
index fb8d1838609f..44f0df83f93e 100644
--- a/drivers/irqchip/irq-riscv-aplic-msi.c
+++ b/drivers/irqchip/irq-riscv-aplic-msi.c
@@ -69,6 +69,20 @@ static int aplic_msi_irq_set_type(struct irq_data *d, unsigned int type)
if (rc)
return rc;
+
+ /*
+ * Edge-triggered sources are fire and forget, so they must be
+ * acknowledged before the handler runs. The edge flow handler also
+ * replays an interrupt which arrives while the previous one is
+ * still being handled on another CPU after an affinity change.
+ */
+ if (type & IRQ_TYPE_EDGE_BOTH)
+ irq_set_chip_handler_name_locked(d, irq_data_get_irq_chip(d),
+ handle_edge_irq, "edge");
+ else
+ irq_set_chip_handler_name_locked(d, irq_data_get_irq_chip(d),
+ handle_fasteoi_irq, "fasteoi");
+
/*
* Updating sourcecfg register for level-triggered interrupts
* requires interrupt retriggering when APLIC is in MSI mode.
--
2.56.0
next prev parent reply other threads:[~2026-11-10 12:06 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 12:06 [PATCH v2 0/2] irqchip/riscv-aplic: Use trigger specific flow handlers in MSI mode Troy Mitchell
2026-11-10 12:06 ` Troy Mitchell [this message]
2026-11-10 12:06 ` [PATCH v2 2/2] irqchip/riscv-aplic: Apply pending affinity changes for level MSI sources Troy Mitchell
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