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From: Jason Yang <jason98166@gmail.com>
To: Vinod Koul <vkoul@kernel.org>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	 Manivannan Sadhasivam <mani@kernel.org>,
	Rob Herring <robh@kernel.org>,
	 Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Heiko Stuebner <heiko@sntech.de>,
	 Guochun Huang <hero.huang@rock-chips.com>,
	 Philipp Zabel <p.zabel@pengutronix.de>
Cc: Michael Riesch <michael.riesch@collabora.com>,
	 Sebastian Reichel <sebastian.reichel@collabora.com>,
	 Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	 linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	 linux-kernel@vger.kernel.org, Sashiko <sashiko-bot@kernel.org>,
	 Jason Yang <jason98166@gmail.com>
Subject: [PATCH v6 3/9] phy: rockchip-samsung-dcphy: Unwind power-on on PLL lock failure
Date: Tue, 10 Nov 2026 16:18:06 +0800	[thread overview]
Message-ID: <20261110-dcphy-rx-v1-v6-3-d681ba20b36a@gmail.com> (raw)
In-Reply-To: <20261110-dcphy-rx-v1-v6-0-d681ba20b36a@gmail.com>

samsung_mipi_dphy_power_on() returns on a PLL lock timeout with PLL_EN
set and m_phy_rst still asserted, and the PHY core does not call
power_off after a failed power_on.

Today the APB reset at the start of the next power_on cleans this up.

A later change moves that reset to runtime resume, so the leftover
PLL_EN would stay set, and regmap_update_bits() would not even write
it again.

Unwind the power-on before returning the error.

Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://lore.kernel.org/linux-phy/sashiko-outbox-174059@kernel.org/
Signed-off-by: Jason Yang <jason98166@gmail.com>
---
 drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c
index 7382043e1f31..ce1bc62497c5 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c
@@ -1343,8 +1343,11 @@ static int samsung_mipi_dphy_power_on(struct samsung_mipi_dcphy *samsung)
 	samsung_mipi_dphy_clk_lane_timing_init(samsung);
 	samsung_mipi_dphy_data_lane_timing_init(samsung);
 	ret = samsung_mipi_dcphy_pll_enable(samsung);
-	if (ret < 0)
+	if (ret < 0) {
+		samsung_mipi_dcphy_pll_disable(samsung);
+		reset_control_deassert(samsung->m_phy_rst);
 		return ret;
+	}
 
 	samsung_mipi_dphy_lane_enable(samsung);
 

-- 
2.43.0


  parent reply	other threads:[~2026-11-10  8:18 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10  8:18 [PATCH v6 0/9] phy: rockchip-samsung-dcphy: Add the MIPI D-PHY receiver Jason Yang
2026-11-10  8:18 ` [PATCH v6 1/9] dt-bindings: phy: Add PHY_DIRECTION_TX/RX definitions Jason Yang
2026-11-10  8:18 ` [PATCH v6 2/9] dt-bindings: phy: rockchip,rk3588-mipi-dcphy: Select TX or RX, add phy-type Jason Yang
2026-11-10  8:18 ` Jason Yang [this message]
2026-11-10  8:18 ` [PATCH v6 4/9] phy: rockchip-samsung-dcphy: Always write the rate-dependent registers Jason Yang
2026-11-10  8:18 ` [PATCH v6 5/9] phy: rockchip-samsung-dcphy: Move block-level setup to runtime resume Jason Yang
2026-11-10  8:18 ` [PATCH v6 6/9] phy: rockchip-samsung-dcphy: Name the transmitter helpers and ops Jason Yang
2026-11-10  8:18 ` [PATCH v6 7/9] phy: rockchip-samsung-dcphy: Support the new phy-type and direction binding Jason Yang
2026-11-10  8:18 ` [PATCH v6 8/9] phy: rockchip-samsung-dcphy: Add MIPI D-PHY receiver support Jason Yang
2026-11-10  8:18 ` [PATCH v6 9/9] arm64: dts: rockchip: add the dcphy mipi csi-2 receiver nodes to rk3588 Jason Yang

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