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From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>,
	Chen-Yu Tsai <wens@kernel.org>,
	 Jernej Skrabec <jernej.skrabec@gmail.com>,
	 Samuel Holland <samuel@sholland.org>,
	Ryan Walklin <ryan@testtoast.com>,
	 Andre Przywara <andre.przywara@arm.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
	 Arun Iyengar <aiyengar1990@gmail.com>
Subject: [PATCH 4/8] arm64: dts: allwinner: h616: Throttle the GPU from the GPU thermal zone
Date: Tue, 10 Nov 2026 05:36:58 +0000	[thread overview]
Message-ID: <20261110-h616-zero2-dt-v1-4-05506d760f21@gmail.com> (raw)
In-Reply-To: <20261110-h616-zero2-dt-v1-0-05506d760f21@gmail.com>

From: Arun Iyengar <aiyengar1990@gmail.com>

The gpu-thermal zone only has the 110 C critical trip point, and the
GPU node is not a cooling device. Once a board describes GPU operating
points (panfrost devfreq), the only reaction to a hot Mali-G31 is
therefore a shutdown.

Make the GPU a cooling device and add a passive trip point at 85 C
(2 C hysteresis) that lets the thermal core lower the GPU OPP. 85 C is
the CPU alert level mainline uses on the H6 (same thermal sensor
generation), and is below the 90 C at which the vendor BSP for the
H616 throttles the GPU (it maps the GPU to its CPU "target" trip).

Boards without a GPU OPP table are not affected: panfrost then
registers no devfreq cooling device and the map stays unbound.

Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 68bd6137c316..93c3b8279241 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -162,6 +162,7 @@ gpu: gpu@1800000 {
 			clock-names = "core", "bus";
 			power-domains = <&prcm_ppu 2>;
 			resets = <&ccu RST_BUS_GPU>;
+			#cooling-cells = <2>;
 			status = "disabled";
 		};
 
@@ -1124,12 +1125,24 @@ gpu-thermal {
 			sustainable-power = <1100>;
 
 			trips {
-				gpu_temp_critical: gpu-trip-0 {
+				gpu_alert: gpu-trip-0 {
+					temperature = <85000>;
+					type = "passive";
+					hysteresis = <2000>;
+				};
+				gpu_temp_critical: gpu-trip-1 {
 					temperature = <110000>;
 					type = "critical";
 					hysteresis = <0>;
 				};
 			};
+
+			cooling-maps {
+				map0 {
+					trip = <&gpu_alert>;
+					cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
 		};
 
 		ve-thermal {

-- 
2.55.0



  parent reply	other threads:[~2026-11-10  5:36 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10  5:36 [PATCH 0/8] arm64: dts: allwinner: h616: Orange Pi Zero2 fixes, GPU DVFS and GPU cooling Arun Iyengar via B4 Relay
2026-11-10  5:36 ` [PATCH 1/8] arm64: dts: allwinner: h616: Cover the codec RAMP register Arun Iyengar via B4 Relay
2026-11-10  5:36 ` [PATCH 2/8] arm64: dts: allwinner: orangepi-zero2: Let the PHY add the RX delay Arun Iyengar via B4 Relay
2026-11-10  5:36 ` [PATCH 3/8] arm64: dts: allwinner: h616: Add GPU OPP table Arun Iyengar via B4 Relay
2026-11-10  5:36 ` Arun Iyengar via B4 Relay [this message]
2026-11-10  5:36 ` [PATCH 5/8] arm64: dts: allwinner: orangepi-zero2: Keep VDD-SYS at or above 900 mV Arun Iyengar via B4 Relay
2026-11-10  5:37 ` [PATCH 6/8] arm64: dts: allwinner: orangepi-zero2: Enable GPU DVFS Arun Iyengar via B4 Relay
2026-11-10  5:37 ` [PATCH 7/8] arm64: dts: allwinner: orangepi-zero2: Describe the SPI NOR supply Arun Iyengar via B4 Relay
2026-11-10  5:37 ` [PATCH 8/8] arm64: dts: allwinner: orangepi-zero2: Add i2c aliases Arun Iyengar via B4 Relay

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