From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Ryan Walklin <ryan@testtoast.com>,
Andre Przywara <andre.przywara@arm.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
Arun Iyengar <aiyengar1990@gmail.com>
Subject: [PATCH 6/8] arm64: dts: allwinner: orangepi-zero2: Enable GPU DVFS
Date: Tue, 10 Nov 2026 05:37:00 +0000 [thread overview]
Message-ID: <20261110-h616-zero2-dt-v1-6-05506d760f21@gmail.com> (raw)
In-Reply-To: <20261110-h616-zero2-dt-v1-0-05506d760f21@gmail.com>
From: Arun Iyengar <aiyengar1990@gmail.com>
The Mali-G31 on the Orange Pi Zero2 runs at a fixed clock. Include the
H616 GPU OPP table so that panfrost registers a devfreq device and
scales the GPU between 306 and 600 MHz with load. The voltage window
of every operating point overlaps the 900 to 990 mV range of the GPU
supply (AXP305 DCDCC, mali-supply).
Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index 719d6dadf7bf..ca78d094c431 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -7,6 +7,7 @@
#include "sun50i-h616-orangepi-zero.dtsi"
#include "sun50i-h616-cpu-opp.dtsi"
+#include "sun50i-h616-gpu-opp.dtsi"
/ {
model = "OrangePi Zero2";
--
2.55.0
next prev parent reply other threads:[~2026-11-10 5:37 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 5:36 [PATCH 0/8] arm64: dts: allwinner: h616: Orange Pi Zero2 fixes, GPU DVFS and GPU cooling Arun Iyengar via B4 Relay
2026-11-10 5:36 ` [PATCH 1/8] arm64: dts: allwinner: h616: Cover the codec RAMP register Arun Iyengar via B4 Relay
2026-11-10 5:36 ` [PATCH 2/8] arm64: dts: allwinner: orangepi-zero2: Let the PHY add the RX delay Arun Iyengar via B4 Relay
2026-11-10 5:36 ` [PATCH 3/8] arm64: dts: allwinner: h616: Add GPU OPP table Arun Iyengar via B4 Relay
2026-11-10 5:36 ` [PATCH 4/8] arm64: dts: allwinner: h616: Throttle the GPU from the GPU thermal zone Arun Iyengar via B4 Relay
2026-11-10 5:36 ` [PATCH 5/8] arm64: dts: allwinner: orangepi-zero2: Keep VDD-SYS at or above 900 mV Arun Iyengar via B4 Relay
2026-11-10 5:37 ` Arun Iyengar via B4 Relay [this message]
2026-11-10 5:37 ` [PATCH 7/8] arm64: dts: allwinner: orangepi-zero2: Describe the SPI NOR supply Arun Iyengar via B4 Relay
2026-11-10 5:37 ` [PATCH 8/8] arm64: dts: allwinner: orangepi-zero2: Add i2c aliases Arun Iyengar via B4 Relay
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