From: Arun Iyengar via B4 Relay <devnull+aiyengar1990.gmail.com@kernel.org>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Heiko Stuebner <heiko@sntech.de>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 1/3] arm64: dts: rockchip: use rgmii-id for the Orange Pi 5/5B ethernet PHY
Date: Tue, 10 Nov 2026 07:19:33 +0000 [thread overview]
Message-ID: <20261110-opi5-dts-v1-1-582b63d074be@gmail.com> (raw)
In-Reply-To: <20261110-opi5-dts-v1-0-582b63d074be@gmail.com>
From: Arun Iyengar <aiyengar1990@gmail.com>
The Orange Pi 5 and 5B have a Motorcomm YT8531C RGMII PHY on gmac1
(the PHY driver binds as "YT8531 Gigabit Ethernet"). The board neither
uses extra long clock traces for TX nor for RX, yet the device tree
describes it as "rgmii-rxid", which according to ethernet-controller.yaml
means that the PCB provides the TX delay, and then makes the MAC insert
the TX delay with tx_delay = <0x42>. The setting was copied from the
vendor kernel, which uses the MAC delay lines everywhere.
Describe the PCB correctly as "rgmii-id" and drop tx_delay, so that the
MAC adds no delay and the PHY adds both: motorcomm.c programs its
default 1950 ps for RX (as now) and for TX. This is the setup the
binding recommends, and the one the same vendor's Orange Pi CM5
(rk3588s-orangepi-cm5-base.dts), with a YT8531C on gmac1 of the same
SoC, already uses in mainline.
Besides being the correct description, this removes the MAC from the
timing path for both directions, so no board-specific delay-line value
is needed any more.
Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi
index c153e7248727..7c1fd5905553 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5-5b.dtsi
@@ -97,14 +97,13 @@ vcc_3v3_sd_s0: regulator-vcc-3v3-sd-s0 {
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;
- phy-mode = "rgmii-rxid";
+ phy-mode = "rgmii-id";
pinctrl-0 = <&gmac1_miim
&gmac1_tx_bus2
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus>;
pinctrl-names = "default";
- tx_delay = <0x42>;
status = "okay";
};
--
2.55.0
next prev parent reply other threads:[~2026-11-10 7:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 7:19 [PATCH 0/3] arm64: dts: rockchip: Orange Pi 5/5B ethernet, SPI NOR supply and USB-C DP Arun Iyengar via B4 Relay
2026-11-10 7:19 ` Arun Iyengar via B4 Relay [this message]
2026-11-10 7:19 ` [PATCH 2/3] arm64: dts: rockchip: add the SPI NOR flash supply on Orange Pi 5 Arun Iyengar via B4 Relay
2026-11-10 7:19 ` [PATCH 3/3] arm64: dts: rockchip: Add USB-C DP AltMode for Orange Pi 5/5B Arun Iyengar via B4 Relay
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