[PATCH net-next v15 01/13] dpll: omit pin phase attributes the driver has no value for

[Ali Rouhi <arouhi@sitime.com>]

From: Oleg Zadorozhnyi <Oleg.Zadorozhnyi@devoxsoftware.com>

Let phase_offset_get and phase_adjust_get return -ENODATA for a pin the
driver has no value for, and leave DPLL_A_PIN_PHASE_OFFSET and
DPLL_A_PIN_PHASE_ADJUST out of the message in that case, as
dpll_msg_add_ffo() already does for the fractional frequency offset.
Today any error from either callback fails the whole pin dump.

A driver that measures the phase offset only on the input its PLL
tracks, or whose part holds a delay larger than the s32 the adjust
attribute carries, has no value to report for the pin, and a zero
cannot be told from a measurement.  A phase adjust request on such a
pin is passed to the driver without the comparison against the old
value, so the delay can still be set or cleared.

Signed-off-by: Oleg Zadorozhnyi <Oleg.Zadorozhnyi@devoxsoftware.com>
Signed-off-by: Ali Rouhi <arouhi@sitime.com>
---
 drivers/dpll/dpll_netlink.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
index e5380d95f238..acf71a93f230 100644
--- a/drivers/dpll/dpll_netlink.c
+++ b/drivers/dpll/dpll_netlink.c
@@ -388,8 +388,11 @@ dpll_msg_add_pin_phase_adjust(struct sk_buff *msg, struct dpll_pin *pin,
 	ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin),
 				    dpll, dpll_priv(dpll),
 				    &phase_adjust, extack);
-	if (ret)
+	if (ret) {
+		if (ret == -ENODATA)
+			return 0;
 		return ret;
+	}
 	if (nla_put_s32(msg, DPLL_A_PIN_PHASE_ADJUST, phase_adjust))
 		return -EMSGSIZE;
 
@@ -411,8 +414,11 @@ dpll_msg_add_phase_offset(struct sk_buff *msg, struct dpll_pin *pin,
 	ret = ops->phase_offset_get(pin, dpll_pin_on_dpll_priv(dpll, pin),
 				    dpll, dpll_priv(dpll), &phase_offset,
 				    extack);
-	if (ret)
+	if (ret) {
+		if (ret == -ENODATA)
+			return 0;
 		return ret;
+	}
 	if (nla_put_64bit(msg, DPLL_A_PIN_PHASE_OFFSET, sizeof(phase_offset),
 			  &phase_offset, DPLL_A_PIN_PAD))
 		return -EMSGSIZE;
@@ -1452,11 +1458,11 @@ dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr,
 	ret = ops->phase_adjust_get(pin, dpll_pin_on_dpll_priv(dpll, pin),
 				    dpll, dpll_priv(dpll), &old_phase_adj,
 				    extack);
-	if (ret) {
+	if (ret && ret != -ENODATA) {
 		NL_SET_ERR_MSG(extack, "unable to get old phase adjust value");
 		return ret;
 	}
-	if (phase_adj == old_phase_adj)
+	if (!ret && phase_adj == old_phase_adj)
 		return 0;
 
 	ret = ops->phase_adjust_set(pin, dpll_pin_on_dpll_priv(dpll, pin),
-- 
2.39.2 (Apple Git-143)