[PATCH] pinctrl: amd: Steer GPIO interrupt to low power/efficiency cores

[Mario Limonciello <mario.limonciello@amd.com>]

On hybrid x86 systems the GPIO controller interrupt can be a frequent
wake and handler source.  Servicing it on a performance core can wake that
core unnecessarily.

Prefer routing it to low power cores, then to efficiency (dense) cores,
using the CPU type from the x86 topology information.  If the system has
neither core type (non-hybrid), leave the affinity untouched.

The placement is applied with irq_set_affinity(), so userspace is still
free to override it.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
 drivers/pinctrl/pinctrl-amd.c | 39 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 30da75bb93b9a..3ae199cc93435 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -31,6 +31,8 @@
 #include <linux/pinctrl/pinmux.h>
 #include <linux/string_choices.h>
 #include <linux/suspend.h>
+#include <linux/cpumask.h>
+#include <linux/processor.h>
 
 #include "core.h"
 #include "pinctrl-utils.h"
@@ -1272,6 +1274,41 @@ static void __iomem *amd_get_named_res(struct device *dev, struct platform_devic
 	return base;
 }
 
+#ifdef CONFIG_X86_64
+/*
+ * On hybrid systems prefer to service the GPIO interrupt on low power cores,
+ * then on efficiency (dense) cores to save power.  Userspace can still
+ * override the placement.  Do nothing if neither core type exists.
+ */
+static void amd_gpio_set_irq_affinity(struct amd_gpio *gpio_dev)
+{
+	static const enum x86_topology_cpu_type types[] = {
+		TOPO_CPU_TYPE_LOW_POWER,
+		TOPO_CPU_TYPE_EFFICIENCY,
+	};
+	cpumask_var_t mask;
+	int cpu, i;
+
+	if (!zalloc_cpumask_var(&mask, GFP_KERNEL))
+		return;
+
+	for (i = 0; i < ARRAY_SIZE(types); i++) {
+		for_each_possible_cpu(cpu) {
+			if (cpu_data(cpu).topo.cpu_type == types[i])
+				cpumask_set_cpu(cpu, mask);
+		}
+		if (!cpumask_empty(mask)) {
+			irq_set_affinity(gpio_dev->irq, mask);
+			break;
+		}
+	}
+
+	free_cpumask_var(mask);
+}
+#else
+static void amd_gpio_set_irq_affinity(struct amd_gpio *gpio_dev) {}
+#endif
+
 static int amd_gpio_probe(struct platform_device *pdev)
 {
 	int ret = 0;
@@ -1377,6 +1414,8 @@ static int amd_gpio_probe(struct platform_device *pdev)
 	if (ret)
 		goto out2;
 
+	amd_gpio_set_irq_affinity(gpio_dev);
+
 	platform_set_drvdata(pdev, gpio_dev);
 	acpi_register_wakeup_handler(gpio_dev->irq, amd_gpio_check_wake, gpio_dev);
 	amd_gpio_register_s2idle_ops();

---
base-commit: 7475ea8b58616b33c04afb976cf0fbaad9dd63fb
change-id: 20261111-superm1-pinctrl-power-improvement-93440daeb293

Best regards,
--  
Mario Limonciello <mario.limonciello@amd.com>