From: Conor Dooley <conor@kernel.org>
To: aleksa.paunovic@htecgroup.com
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Djordje Todorovic <djordje.todorovic@htecgroup.com>,
Anup Patel <anup@brainfault.org>,
Thomas Gleixner <tglx@kernel.org>, Radu Rendec <radu@rendec.net>,
Inochi Amaoto <inochiama@outlook.com>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org,
Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>
Subject: Re: [PATCH v2 6/8] dt-bindings: timer: Add MIPS P8700 ACLINT MTIMER
Date: Wed, 11 Nov 2026 10:01:39 +0000 [thread overview]
Message-ID: <20261111-underage-distant-87bff35745b9@spud> (raw)
In-Reply-To: <20261103-charm-ending-efe2b7081ca7@spud>
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On Tue, Nov 03, 2026 at 09:49:22PM +0000, Conor Dooley wrote:
> On Tue, Nov 03, 2026 at 04:11:30PM +0100, Aleksa Paunovic via B4 Relay wrote:
> > From: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
> >
> > Document the MIPS P8700 ACLINT MTIMER.
> > Extend support for both mtimecmp and mtime registers
> > within the ACLINT MTIMER, identified via reg-names.
> >
> > Signed-off-by: Aleksa Paunovic <aleksa.paunovic@htecgroup.com>
>
> Same comments here too.
>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> pw-bot: not-applicable
On second thoughts, we probably need to be careful about the reg
ordering here. This binding has always required that mtimecmp be "first"
because it was the only let me rescind my ack for now and think about
what the correct thing to do is...
Cheers,
Conor.
>
> > ---
> > .../bindings/timer/thead,c900-aclint-mtimer.yaml | 35 ++++++++++++++++++++++
> > 1 file changed, 35 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
> > index cf7c82e980f674afcf59fc726742dc4f49c1a820..40acb651c27b7eaa8a20caa8bbc225b350088810 100644
> > --- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
> > +++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
> > @@ -21,14 +21,19 @@ properties:
> > - enum:
> > - anlogic,dr1v90-aclint-mtimer
> > - const: nuclei,ux900-aclint-mtimer
> > + - const: gf,mips-p8700-aclint-mtimer
> >
> > reg:
> > + minItems: 1
> > items:
> > - description: MTIMECMP Registers
> > + - description: MTIME Registers
> >
> > reg-names:
> > + minItems: 1
> > items:
> > - const: mtimecmp
> > + - const: mtime
> >
> > interrupts-extended:
> > minItems: 1
> > @@ -42,6 +47,25 @@ required:
> > - reg-names
> > - interrupts-extended
> >
> > +allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + const: gf,mips-p8700-aclint-mtimer
> > + then:
> > + properties:
> > + reg:
> > + minItems: 2
> > + reg-names:
> > + minItems: 2
> > + else:
> > + properties:
> > + reg:
> > + maxItems: 1
> > + reg-names:
> > + maxItems: 1
> > +
> > examples:
> > - |
> > timer@ac000000 {
> > @@ -53,4 +77,15 @@ examples:
> > reg = <0xac000000 0x00010000>;
> > reg-names = "mtimecmp";
> > };
> > +
> > + - |
> > + timer@16154000 {
> > + compatible = "gf,mips-p8700-aclint-mtimer";
> > + reg = <0x16154000 0x7ff8>, <0x16108050 0x8>;
> > + reg-names = "mtimecmp", "mtime";
> > + interrupts-extended = <&cpu1intc 7>,
> > + <&cpu2intc 7>,
> > + <&cpu3intc 7>,
> > + <&cpu4intc 7>;
> > + };
> > ...
> >
> > --
> > 2.43.0
> >
> >
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next prev parent reply other threads:[~2026-11-11 10:01 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 15:11 [PATCH v2 0/8] Add support for MIPS P8700 Aleksa Paunovic via B4 Relay
2026-11-03 15:11 ` [PATCH v2 1/8] dt-bindings: vendor-prefixes: Add GlobalFoundries, Inc Aleksa Paunovic via B4 Relay
2026-11-03 15:11 ` [PATCH v2 2/8] dt-bindings: riscv: cpus: add gf,mips-p8700 Aleksa Paunovic via B4 Relay
2026-11-03 21:46 ` Conor Dooley
2026-11-03 15:11 ` [PATCH v2 3/8] dt-bindings: riscv: Add MIPS Boston board compatible Aleksa Paunovic via B4 Relay
2026-11-03 21:43 ` Conor Dooley
2026-11-03 15:11 ` [PATCH v2 4/8] dt-bindings: interrupt-controller: Add MIPS P8700 APLIC Aleksa Paunovic via B4 Relay
2026-11-03 21:46 ` Conor Dooley
2026-11-03 15:11 ` [PATCH v2 5/8] dt-bindings: interrupt-controller: Add MIPS P8700 ACLINT MSWI Aleksa Paunovic via B4 Relay
2026-11-03 21:51 ` Conor Dooley
2026-11-03 15:11 ` [PATCH v2 6/8] dt-bindings: timer: Add MIPS P8700 ACLINT MTIMER Aleksa Paunovic via B4 Relay
2026-11-03 21:49 ` Conor Dooley
2026-11-11 10:01 ` Conor Dooley [this message]
2026-11-03 15:11 ` [PATCH v2 7/8] riscv: dts: gf: Initial support for the P8700 Boston board Aleksa Paunovic via B4 Relay
2026-11-03 21:51 ` Conor Dooley
2026-11-03 15:11 ` [PATCH v2 8/8] riscv: defconfig: Enable GF SoCs Aleksa Paunovic via B4 Relay
2026-11-03 21:47 ` Conor Dooley
2026-11-03 21:59 ` [PATCH v2 0/8] Add support for MIPS P8700 Conor Dooley
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