From: Akshay Gupta <Akshay.Gupta@amd.com>
To: <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>
Cc: <arnd@arndb.de>, <gregkh@linuxfoundation.org>, <corbet@lwn.net>,
<skhan@linuxfoundation.org>, <rdunlap@infradead.org>,
<linux@roeck-us.net>, <naveenkrishna.chatradhi@amd.com>,
<Anand.Umarji@amd.com>, Prathima Lk <Prathima.Lk@amd.com>,
Akshay Gupta <Akshay.Gupta@amd.com>
Subject: [PATCH v1 1/3] misc: amd-sbi: use sized DMA-safe I3C tx/rx buffers
Date: Wed, 11 Nov 2026 11:10:32 +0530 [thread overview]
Message-ID: <20261111054034.2453874-2-Akshay.Gupta@amd.com> (raw)
In-Reply-To: <20261111054034.2453874-1-Akshay.Gupta@amd.com>
From: Prathima Lk <Prathima.Lk@amd.com>
This change replaces the open-coded tx[2] array and single-byte scalar rx
field in struct sbtsi_i3c_priv with named, sized buffers (SBTSI_TX_LEN and
SBTSI_RX_LEN) and makes rx a proper array. The motivation is an upcoming
patch adding the SB-TSI Trace Buffer Acquire Interface, which shares the
same I3C target core and needs larger buffers. Preparing the sizes now
lets that follow-up patch grow the buffers without reworking the struct or
register access code.
Each buffer stays aligned to ARCH_DMA_MINALIGN for
DMA safety on noncoherent platforms. Affected areas are tsi-core.c and
tsi-core.h.
Tested by building the driver and verifying I3C register reads
and writes still function correctly on the target hardware.
Signed-off-by: Prathima Lk <Prathima.Lk@amd.com>
Signed-off-by: Akshay Gupta <Akshay.Gupta@amd.com>
---
drivers/misc/amd-sbi/tsi-core.c | 4 ++--
drivers/misc/amd-sbi/tsi-core.h | 8 ++++++--
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/misc/amd-sbi/tsi-core.c b/drivers/misc/amd-sbi/tsi-core.c
index 5c178702c67a..1920e4dc7b67 100644
--- a/drivers/misc/amd-sbi/tsi-core.c
+++ b/drivers/misc/amd-sbi/tsi-core.c
@@ -60,13 +60,13 @@ static int sbtsi_i3c_read(struct sbtsi_data *data, u8 reg, u8 *val)
/* Read the data byte into a separate buffer (DMA_FROM_DEVICE). */
xfers[1].rnw = true;
xfers[1].len = 1;
- xfers[1].data.in = &priv->rx;
+ xfers[1].data.in = priv->rx;
ret = i3c_device_do_xfers(data->i3cdev, xfers, 2, I3C_SDR);
if (ret)
return ret;
- *val = priv->rx;
+ *val = priv->rx[0];
return ret;
}
diff --git a/drivers/misc/amd-sbi/tsi-core.h b/drivers/misc/amd-sbi/tsi-core.h
index 4cf55c46230e..8efe7e220f4a 100644
--- a/drivers/misc/amd-sbi/tsi-core.h
+++ b/drivers/misc/amd-sbi/tsi-core.h
@@ -11,6 +11,10 @@
#include <linux/cache.h>
#include <linux/misc/tsi.h>
+/* SB-TSI register access transaction sizes in bytes. */
+#define SBTSI_TX_LEN 2 /* [0] register address, [1] value */
+#define SBTSI_RX_LEN 1 /* single data byte */
+
/**
* struct sbtsi_i3c_priv - per-device state for I3C SBTSI (includes DMA-safe buffers)
* @data: public device state exposed via dev_set_drvdata()
@@ -19,8 +23,8 @@
*/
struct sbtsi_i3c_priv {
struct sbtsi_data data;
- u8 tx[2];
- u8 rx __aligned(ARCH_DMA_MINALIGN);
+ u8 tx[SBTSI_TX_LEN] __aligned(ARCH_DMA_MINALIGN);
+ u8 rx[SBTSI_RX_LEN] __aligned(ARCH_DMA_MINALIGN);
};
int create_misc_tsi_device(struct sbtsi_data *data, struct device *dev);
--
2.34.1
next prev parent reply other threads:[~2026-11-11 5:41 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-11 5:40 [PATCH v1 0/3] misc: amd-sbi: Add TBAI trace-buffer access over I3C Akshay Gupta
2026-11-11 5:40 ` Akshay Gupta [this message]
2026-11-11 5:40 ` [PATCH v1 2/3] " Akshay Gupta
2026-11-11 5:40 ` [PATCH v1 3/3] docs: amd-sbi: document TBAI trace-buffer ioctl Akshay Gupta
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