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From: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Abel Vesa <abelvesa@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Subject: [PATCH v9 10/11] arm64: dts: qcom: ipq5210: Add SPI node definitions
Date: Thu, 12 Nov 2026 10:06:29 +0530	[thread overview]
Message-ID: <20261112-08-dts-v9-10-c34de4f78fbb@oss.qualcomm.com> (raw)
In-Reply-To: <20261112-08-dts-v9-0-c34de4f78fbb@oss.qualcomm.com>

Add SPI node definition for the QUP SPI blocks present in IPQ5210.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/ipq5210.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5210.dtsi b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
index 36f874e57b42..052c2f3df94d 100644
--- a/arch/arm64/boot/dts/qcom/ipq5210.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5210.dtsi
@@ -181,6 +181,14 @@ opp-32000000 {
 		};
 	};
 
+	spi_opp_table_50mhz: opp-table-spi50mhz {
+		compatible = "operating-points-v2";
+
+		opp-50000000 {
+			opp-hz = /bits/ 64 <50000000>;
+		};
+	};
+
 	pmu {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
@@ -459,6 +467,18 @@ qupv3: geniqup@1ac0000 {
 			#address-cells = <2>;
 			#size-cells = <2>;
 
+			spi0: spi@1a80000 {
+				compatible = "qcom,geni-spi";
+				reg = <0x0 0x01a80000 0x0 0x4000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&gcc GCC_QUPV3_WRAP_SE0_CLK>;
+				clock-names = "se";
+				interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+				operating-points-v2 = <&spi_opp_table_50mhz>;
+				status = "disabled";
+			};
+
 			uart1: serial@1a84000 {
 				compatible = "qcom,geni-debug-uart";
 				reg = <0x0 0x01a84000 0x0 0x4000>;
@@ -495,6 +515,18 @@ i2c1: i2c@1a8c000 {
 				status = "disabled";
 			};
 
+			spi1: spi@1a90000 {
+				compatible = "qcom,geni-spi";
+				reg = <0x0 0x01a90000 0x0 0x4000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&gcc GCC_QUPV3_WRAP_SE4_CLK>;
+				clock-names = "se";
+				interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+				operating-points-v2 = <&spi_opp_table_50mhz>;
+				status = "disabled";
+			};
+
 			i2c2: i2c@1a94000 {
 				compatible = "qcom,geni-i2c";
 				reg = <0x0 0x01a94000 0x0 0x4000>;

-- 
2.34.1


  parent reply	other threads:[~2026-11-12  4:37 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-12  4:36 [PATCH v9 00/11] Enable mutliple peripherals in IPQ5210 Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 01/11] arm64: dts: qcom: ipq5210: Add nodes for multiple peripherals Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 02/11] arm64: dts: qcom: ipq5210: Introduce RDP504 common DT file Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 03/11] arm64: dts: qcom: ipq5210: Introduce RDP504 NAND variant " Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 04/11] arm64: dts: qcom: ipq5210: Add support for WPS button Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 05/11] arm64: dts: qcom: ipq5210: Add C3 CPU idle state Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 06/11] arm64: dts: qcom: ipq5210: Add ICE support to SDHCI Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 07/11] arm64: dts: qcom: ipq5210: Enable download mode support Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 08/11] arm64: dts: qcom: ipq5210: Enable the PWM block Varadarajan Narayanan
2026-11-12  4:36 ` [PATCH v9 09/11] arm64: dts: qcom: ipq5210: Add I2C nodes Varadarajan Narayanan
2026-11-12  4:36 ` Varadarajan Narayanan [this message]
2026-11-12  4:36 ` [PATCH v9 11/11] arm64: dts: qcom: ipq5210: Add random number generator node Varadarajan Narayanan

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