* [PATCH v2 1/2] dt-bindings: crypto: Correct Shikra QCE compatible hierarchy
2026-11-12 12:51 [PATCH v2 0/2] Shikra: Fix qce configuration Kuldeep Singh
@ 2026-11-12 12:51 ` Kuldeep Singh
2026-11-12 12:51 ` [PATCH v2 2/2] arm64: dts: qcom: shikra: Correct QCE node configuration Kuldeep Singh
1 sibling, 0 replies; 3+ messages in thread
From: Kuldeep Singh @ 2026-11-12 12:51 UTC (permalink / raw)
To: Bartosz Golaszewski, Herbert Xu, David S. Miller, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: Kuldeep Singh, Bartosz Golaszewski, linux-crypto, linux-arm-msm,
devicetree, linux-kernel, Konrad Dybcio
Shikra QCE requires an explicit core clock, while the existing
"qcom,sm8150-qce" fallback allows the clock property to be omitted.
Shikra follows the same QCE clock requirements as QRB2210(agatti).
Update the Shikra fallback to "qcom,ipq4019-qce", which requires the
core clock to be specified.
Fixes: 45834ff95a6f ("dt-bindings: crypto: qcom-qce: Document the Shikra crypto engine")
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
---
Documentation/devicetree/bindings/crypto/qcom-qce.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
index 5a653757ee75..fcf725bfa36b 100644
--- a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml
@@ -39,6 +39,7 @@ properties:
- qcom,msm8996-qce
- qcom,qcm2290-qce
- qcom,sdm845-qce
+ - qcom,shikra-qce
- qcom,sm6115-qce
- const: qcom,ipq4019-qce
- const: qcom,qce
@@ -54,7 +55,6 @@ properties:
- qcom,qcs8300-qce
- qcom,sa8775p-qce
- qcom,sc7280-qce
- - qcom,shikra-qce
- qcom,sm6350-qce
- qcom,sm8250-qce
- qcom,sm8350-qce
@@ -133,6 +133,7 @@ allOf:
contains:
enum:
- qcom,qcm2290-qce
+ - qcom,shikra-qce
- qcom,sm6115-qce
then:
properties:
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread* [PATCH v2 2/2] arm64: dts: qcom: shikra: Correct QCE node configuration
2026-11-12 12:51 [PATCH v2 0/2] Shikra: Fix qce configuration Kuldeep Singh
2026-11-12 12:51 ` [PATCH v2 1/2] dt-bindings: crypto: Correct Shikra QCE compatible hierarchy Kuldeep Singh
@ 2026-11-12 12:51 ` Kuldeep Singh
1 sibling, 0 replies; 3+ messages in thread
From: Kuldeep Singh @ 2026-11-12 12:51 UTC (permalink / raw)
To: Bartosz Golaszewski, Herbert Xu, David S. Miller, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson,
Konrad Dybcio, Abel Vesa
Cc: Kuldeep Singh, Bartosz Golaszewski, linux-crypto, linux-arm-msm,
devicetree, linux-kernel, Konrad Dybcio, Wenjia Zhang
Shikra QCE requires an explicit core clock, which is missing from the
current configuration. Add core clock and adjust fallback compatible to
match updated binding description.
Cryptobam is controlled remotely and its clocks are therefore managed by
remote crypto subsystem.
Fixes: 099cd05d200b ("arm64: dts: qcom: shikra: Add ICE, TRNG and QCE nodes")
Tested-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> #on shikra device
Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/shikra.dtsi | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index 0a95ad5a5582..d5f0ef863173 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -1208,7 +1208,7 @@ cryptobam: dma-controller@1b04000 {
};
crypto: crypto@1b3a000 {
- compatible = "qcom,shikra-qce", "qcom,sm8150-qce", "qcom,qce";
+ compatible = "qcom,shikra-qce", "qcom,ipq4019-qce", "qcom,qce";
reg = <0x0 0x01b3a000 0x0 0x6000>;
dmas = <&cryptobam 4>, <&cryptobam 5>;
dma-names = "rx", "tx";
@@ -1219,9 +1219,8 @@ crypto: crypto@1b3a000 {
<&apps_smmu 0x96 0x0011>,
<&apps_smmu 0x98 0x0001>,
<&apps_smmu 0x9f 0x0>;
- interconnects = <&system_noc MASTER_CRYPTO_CORE0 0
- &mc_virt SLAVE_EBI_CH0 0>;
- interconnect-names = "memory";
+ clocks = <&rpmcc RPM_SMD_CE1_CLK>;
+ clock-names = "core";
};
qfprom: efuse@1b44000 {
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread