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From: fangyu.yu@linux.alibaba.com
To: tanchi25@mails.ucas.ac.cn
Cc: alex@ghiti.fr, andrew.jones@linux.dev, anup@brainfault.org,
	aou@eecs.berkeley.edu, atish.patra@linux.dev,
	baolu.lu@linux.intel.com, fangyu.yu@linux.alibaba.com,
	gong.shuai@sanechips.com.cn, guoren@kernel.org,
	iommu@lists.linux.dev, jgg@nvidia.com, jgg@ziepe.ca,
	joerg.roedel@amd.com, joro@8bytes.org, jroedel@suse.de,
	kevin.tian@intel.com, kvm-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	palmer@dabbelt.com, pjw@kernel.org, robin.murphy@arm.com,
	skhawaja@google.com, tomasz.jeznach@linux.dev,
	vasant.hegde@amd.com, will@kernel.org, zong.li@sifive.com
Subject: Re: [PATCH v7 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains
Date: Thu, 12 Nov 2026 10:14:48 +0800	[thread overview]
Message-ID: <20261112021448.48441-1-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <20261111150249.13262-1-tanchi25@mails.ucas.ac.cn>

>Hi Fangyu,
>
>The following QEMU patch series adds support for automatic PTE A/D updates through AMO_HWAD:
>
>https://lore.kernel.org/qemu-devel/20261108143934.129923-1-tanchi25@mails.ucas.ac.cn/
>
>It may be useful for the end-to-end dirty tracking tests mentioned in your follow-up work,
>particularly for testing G-stage dirty-bit updates triggered by DMA writes.
>
>If you notice any issues with the implementation, feedback would be very welcome.
>

Hi Tan Chi,

Thanks for your work on adding HWAD support in QEMU. In the next
version, I’ll include your patch in my test setup and run the
related tests there.

Thanks,
Fangyu

>Thanks,
>Tan Chi

      reply	other threads:[~2026-11-12  2:15 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-03 12:02 fangyu.yu
2026-11-03 12:02 ` [PATCH v7 01/10] iommu/generic_pt: Fix the RISC-V supported feature mask fangyu.yu
2026-11-03 12:02 ` [PATCH v7 02/10] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-11-03 12:02 ` [PATCH v7 03/10] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-11-03 12:02 ` [PATCH v7 04/10] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-11-03 12:02 ` [PATCH v7 05/10] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-11-04  9:21   ` Gong Shuai
2026-11-04 11:27     ` fangyu.yu
2026-11-03 12:02 ` [PATCH v7 06/10] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-11-04  6:45   ` Gong Shuai
2026-11-04 10:59     ` fangyu.yu
2026-11-03 12:02 ` [PATCH v7 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-11-03 12:02 ` [PATCH v7 08/10] iommu/riscv: Pre-enable GADE for second-stage domains fangyu.yu
2026-11-03 12:02 ` [PATCH v7 09/10] iommu/riscv: Add dirty tracking support " fangyu.yu
2026-11-04  8:45   ` Gong Shuai
2026-11-04 11:50     ` fangyu.yu
2026-11-03 12:02 ` [PATCH v7 10/10] iommu/riscv: Add IOTINVAL.GVMA invalidations fangyu.yu
2026-11-11 15:02 ` [PATCH v7 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains Tan Chi
2026-11-12  2:14   ` fangyu.yu [this message]

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