From: Ian Rogers <irogers@google.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>
Cc: Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
James Clark <james.clark@linaro.org>,
Kan Liang <kan.liang@linux.intel.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
Ian Rogers <irogers@google.com>
Subject: [PATCH 03/10] perf jevents: Store PMU names as string literals in struct pmu_table_entry
Date: Fri, 13 Nov 2026 13:08:15 -0800 [thread overview]
Message-ID: <20261113210822.3112700-4-irogers@google.com> (raw)
In-Reply-To: <20261113210822.3112700-1-irogers@google.com>
Every PMU table lookup (perf_pmu__find_events_table(), map_for_pmu(),
pmu_events_table__for_each_event(), pmu_events_table__find_event(),
pmu_events_table__num_events(), pmu_metrics_table__find_metric()) scans
table_pmu->pmu_name across PMU table entries to check wildcard matches.
Across all architectures, there are only 68 unique PMU name strings
(536 bytes total) across ~443 pmu_table_entry rows (which already reside
in .data.rel.ro due to their entries pointer). Replace
struct compact_pmu_event pmu_name in struct pmu_table_entry with a plain
const char *pmu_name string literal so the compiler and linker merge the
PMU name strings in .rodata.str1.1 while hot PMU wildcard scans never
touch big_c_string or trigger block decompression.
Regenerate empty-pmu-events.c accordingly.
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/pmu-events/empty-pmu-events.c | 4065 +++++++++++-----------
tools/perf/pmu-events/jevents.py | 42 +-
2 files changed, 2033 insertions(+), 2074 deletions(-)
diff --git a/tools/perf/pmu-events/empty-pmu-events.c b/tools/perf/pmu-events/empty-pmu-events.c
index c0023687e3dd..6121ef3d2a98 100644
--- a/tools/perf/pmu-events/empty-pmu-events.c
+++ b/tools/perf/pmu-events/empty-pmu-events.c
@@ -13,8 +13,8 @@ struct compact_pmu_event {
struct pmu_table_entry {
const struct compact_pmu_event *entries;
+ const char *pmu_name;
uint32_t num_entries;
- struct compact_pmu_event pmu_name;
};
/* clang-format off */
@@ -640,2020 +640,1998 @@ static const char *const big_c_string =
/* offset=29578 */
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+/* offset=29802 */
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"i-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39182 */
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"i-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39273 */
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"i-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=39366 */
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"i-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=39461 */
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"i-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39549 */
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"i-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39643 */
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"i-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39732 */
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"i-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39821 */
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"i-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=39905 */
+/* offset=39863 */
"idle-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This event is an alias of stalled-cycles-backend]\000legacy-hardware-config=8\000\00000\000\000\000\000\000"
-/* offset=40058 */
+/* offset=40016 */
"idle-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This event is an alias of stalled-cycles-frontend]\000legacy-hardware-config=7\000\00000\000\000\000\000\000"
-/* offset=40208 */
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"instruction-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=40297 */
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"instruction-tlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"instruction-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=40487 */
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"instruction-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=40588 */
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"instruction-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=40691 */
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"instruction-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=40796 */
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"instruction-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=40894 */
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"instruction-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=40998 */
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"instruction-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=41097 */
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"instruction-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=41192 */
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"instruction-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"instruction-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
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"instruction-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
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"instruction-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"instruction-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=41808 */
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"instruction-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=41906 */
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"instruction-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=42006 */
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"instruction-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=42099 */
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"instruction-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"instruction-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=42294 */
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"instruction-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=42397 */
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"instruction-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=42502 */
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"instruction-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=42600 */
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"instruction-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"instruction-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=42803 */
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"instruction-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=42902 */
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"instruction-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=42996 */
+/* offset=42954 */
"instructions\000legacy hardware\000Retired instructions. Be careful, these can be affected by various issues, most notably hardware interrupt counts\000legacy-hardware-config=1\000\00000\000\000\000\000\000"
-/* offset=43172 */
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"itlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=43250 */
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"itlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=43508 */
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"itlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=43600 */
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"itlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00000\000\000\000\000\000"
-/* offset=43694 */
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"itlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=43781 */
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"itlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
-/* offset=43874 */
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"itlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00000\000\000\000\000\000"
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"itlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=44230 */
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"itlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
-/* offset=44325 */
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"itlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
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"itlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
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"itlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=0x10004\000\00010\000\000\000\000\000"
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"itlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"itlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\000\00010\000\000\000\000\000"
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"l1-d\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
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"l1-d-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
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"l1-d-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
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"l1-d-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=0\000\00010\000\000\000\000\000"
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+/* offset=121646 */
"node-read-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"
-/* offset=121773 */
+/* offset=121731 */
"node-reference\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"
-/* offset=121858 */
+/* offset=121816 */
"node-refs\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\00010\000\000\000\000\000"
-/* offset=121938 */
+/* offset=121896 */
"node-speculative-load\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122038 */
+/* offset=121996 */
"node-speculative-load-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122145 */
+/* offset=122103 */
"node-speculative-load-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"
-/* offset=122250 */
+/* offset=122208 */
"node-speculative-load-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"
-/* offset=122357 */
+/* offset=122315 */
"node-speculative-load-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122461 */
+/* offset=122419 */
"node-speculative-load-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122571 */
+/* offset=122529 */
"node-speculative-load-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122676 */
+/* offset=122634 */
"node-speculative-read\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122776 */
+/* offset=122734 */
"node-speculative-read-access\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=122883 */
+/* offset=122841 */
"node-speculative-read-miss\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"
-/* offset=122988 */
+/* offset=122946 */
"node-speculative-read-misses\000legacy cache\000Local memory prefetch misses\000legacy-cache-config=0x10206\000\00010\000\000\000\000\000"
-/* offset=123095 */
+/* offset=123053 */
"node-speculative-read-ops\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=123199 */
+/* offset=123157 */
"node-speculative-read-reference\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=123309 */
+/* offset=123267 */
"node-speculative-read-refs\000legacy cache\000Local memory prefetch accesses\000legacy-cache-config=0x206\000\00010\000\000\000\000\000"
-/* offset=123414 */
+/* offset=123372 */
"node-store\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=123500 */
+/* offset=123458 */
"node-store-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=123593 */
+/* offset=123551 */
"node-store-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"
-/* offset=123684 */
+/* offset=123642 */
"node-store-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00000\000\000\000\000\000"
-/* offset=123777 */
+/* offset=123735 */
"node-store-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=123867 */
+/* offset=123825 */
"node-store-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=123963 */
+/* offset=123921 */
"node-store-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124054 */
+/* offset=124012 */
"node-stores\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00000\000\000\000\000\000"
-/* offset=124141 */
+/* offset=124099 */
"node-stores-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124235 */
+/* offset=124193 */
"node-stores-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"
-/* offset=124327 */
+/* offset=124285 */
"node-stores-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"
-/* offset=124421 */
+/* offset=124379 */
"node-stores-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124512 */
+/* offset=124470 */
"node-stores-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124609 */
+/* offset=124567 */
"node-stores-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124701 */
+/* offset=124659 */
"node-write\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124787 */
+/* offset=124745 */
"node-write-access\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=124880 */
+/* offset=124838 */
"node-write-miss\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"
-/* offset=124971 */
+/* offset=124929 */
"node-write-misses\000legacy cache\000Local memory write misses\000legacy-cache-config=0x10106\000\00010\000\000\000\000\000"
-/* offset=125064 */
+/* offset=125022 */
"node-write-ops\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=125154 */
+/* offset=125112 */
"node-write-reference\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=125250 */
+/* offset=125208 */
"node-write-refs\000legacy cache\000Local memory write accesses\000legacy-cache-config=0x106\000\00010\000\000\000\000\000"
-/* offset=125341 */
+/* offset=125299 */
"num_cores\000tool\000Number of cores. A core consists of 1 or more thread, with each thread being associated with a logical Linux CPU\000config=5\000\00000\000\000\000\000\000"
-/* offset=125486 */
+/* offset=125444 */
"num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPUs on a core\000config=6\000\00000\000\000\000\000\000"
-/* offset=125589 */
+/* offset=125547 */
"num_cpus_online\000tool\000Number of online logical Linux CPUs. There may be multiple such CPUs on a core\000config=7\000\00000\000\000\000\000\000"
-/* offset=125706 */
+/* offset=125664 */
"num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000\00000\000\000\000\000\000"
-/* offset=125782 */
+/* offset=125740 */
"num_packages\000tool\000Number of packages. Each package has 1 or more die\000config=9\000\00000\000\000\000\000\000"
-/* offset=125868 */
+/* offset=125826 */
"page-faults\000software\000Number of page faults [This event is an alias of faults]\000config=2\000\00000\000\000\000\000\000"
-/* offset=125963 */
+/* offset=125921 */
"ref-cycles\000legacy hardware\000Total cycles; not affected by CPU frequency scaling\000legacy-hardware-config=9\000\00000\000\000\000\000\000"
-/* offset=126075 */
+/* offset=126033 */
"segment_reg_loads.any\000other\000Number of segment register loads\000event=6,period=200000,umask=0x80\000\00000\000\000\000\000\000"
-/* offset=126177 */
+/* offset=126135 */
"slots\000tool\000Number of functional units that in parallel can execute parts of an instruction\000config=0xa\000\00000\000\000\000\000\000"
-/* offset=126287 */
+/* offset=126245 */
"smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enable otherwise 0\000config=0xb\000\00000\000\000\000\000\000"
-/* offset=126394 */
-"software\000"
-/* offset=126403 */
+/* offset=126352 */
"stalled-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This event is an alias of idle-cycles-backend]\000legacy-hardware-config=8\000\00000\000\000\000\000\000"
-/* offset=126556 */
+/* offset=126505 */
"stalled-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This event is an alias of idle-cycles-frontend]\000legacy-hardware-config=7\000\00000\000\000\000\000\000"
-/* offset=126706 */
+/* offset=126655 */
"sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000\000\000\000\000\000"
-/* offset=126783 */
+/* offset=126732 */
"sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type=5\000(434|436|43c|43a).*\00000\000\000\000\000\000"
-/* offset=126926 */
+/* offset=126875 */
"sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8\00000\000\000\000\000\000"
-/* offset=127002 */
+/* offset=126951 */
"system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\000\000\000\000\000"
-/* offset=127070 */
+/* offset=127019 */
"system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per second\000config=0xc\000\00000\000\000\000\000\000"
-/* offset=127169 */
+/* offset=127118 */
"target_cpu\000tool\0001 if CPUs being analyzed, 0 if threads/processes\000config=0xe\000\00000\000\000\000\000\000"
-/* offset=127253 */
+/* offset=127202 */
"task-clock\000software\000Per-task high-resolution timer based event\000config=1\000\000001e-6msec\000\000\000\000\000"
-/* offset=127341 */
-"tool\000"
-/* offset=127346 */
+/* offset=127290 */
"unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core snoop resulted from L3 Eviction which misses in some processor core\000event=0x22,umask=0x81\000\00000\000\000\000\000\000"
-/* offset=127500 */
-"uncore_cbox\000"
-/* offset=127512 */
+/* offset=127444 */
"uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000\000\000\000\000\000"
-/* offset=127582 */
+/* offset=127514 */
"uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\000\000\000\000\000"
-/* offset=127650 */
-"uncore_imc\000"
-/* offset=127661 */
+/* offset=127582 */
"uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\000\000\000\000"
-/* offset=127726 */
-"uncore_imc_free_running\000"
-/* offset=127750 */
+/* offset=127647 */
"uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12\000\00000\000\000\000\000\000"
-/* offset=127830 */
-"uncore_sys_ccn_pmu\000"
-/* offset=127849 */
-"uncore_sys_cmn_pmu\000"
-/* offset=127868 */
-"uncore_sys_ddr_pmu\000"
-/* offset=127887 */
+/* offset=127727 */
"user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000\000\000\000\000\000"
-/* offset=127957 */
+/* offset=127797 */
"CPI\000\0001 / IPC\000\000\000\000\000\000\000\000000"
-/* offset=127980 */
+/* offset=127820 */
"CPUs_utilized\000Default\000(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)\000\000Average CPU utilization\000\0001CPUs\000\000\000\000011"
-/* offset=128166 */
+/* offset=128006 */
"DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\000000"
-/* offset=128231 */
+/* offset=128071 */
"DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\000000"
-/* offset=128326 */
+/* offset=128166 */
"DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\000000"
-/* offset=128461 */
+/* offset=128301 */
"DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\000000"
-/* offset=128530 */
+/* offset=128370 */
"DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\000000"
-/* offset=128601 */
+/* offset=128441 */
"Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\000000"
-/* offset=128768 */
+/* offset=128608 */
"IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\000000"
-/* offset=128832 */
+/* offset=128672 */
"L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\000000"
-/* offset=128904 */
+/* offset=128744 */
"M1\000\000ipc + M2\000\000\000\000\000\000\000\000000"
-/* offset=128927 */
+/* offset=128767 */
"M2\000\000ipc + M1\000\000\000\000\000\000\000\000000"
-/* offset=128950 */
+/* offset=128790 */
"M3\000\0001 / M3\000\000\000\000\000\000\000\000000"
-/* offset=128971 */
+/* offset=128811 */
"backend_cycles_idle\000Default\000(stalled\\-cycles\\-backend / cpu\\-cycles if has_event(stalled\\-cycles\\-backend) else 0)\000backend_cycles_idle > 0.2\000Backend stalls per cycle\000\000\000\000\000\000001"
-/* offset=129145 */
+/* offset=128985 */
"branch_frequency\000Default\000branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Branches per CPU second\000\0001000M/sec\000\000\000\000011"
-/* offset=129325 */
+/* offset=129165 */
"branch_miss_rate\000Default\000branch\\-misses / branches\000branch_miss_rate > 0.05\000Branch miss rate\000\000100%\000\000\000\000001"
-/* offset=129429 */
+/* offset=129269 */
"cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\000000"
-/* offset=129501 */
+/* offset=129341 */
"cs_per_second\000Default\000software@context\\-switches\\,name\\=context\\-switches@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Context switches per CPU second\000\0001cs/sec\000\000\000\000011"
-/* offset=129734 */
+/* offset=129574 */
"cycles_frequency\000Default\000cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Cycles per CPU second\000\0001GHz\000\000\000\000011"
-/* offset=129910 */
+/* offset=129750 */
"dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\000000"
-/* offset=129975 */
+/* offset=129815 */
"dtlb_miss_rate\000Default3\000dTLB\\-load\\-misses / dTLB\\-loads\000dtlb_miss_rate > 0.05\000dTLB miss rate\000\000100%\000\000\000\000001"
-/* offset=130081 */
+/* offset=129921 */
"frontend_cycles_idle\000Default\000(stalled\\-cycles\\-frontend / cpu\\-cycles if has_event(stalled\\-cycles\\-frontend) else 0)\000frontend_cycles_idle > 0.1\000Frontend stalls per cycle\000\000\000\000\000\000001"
-/* offset=130260 */
+/* offset=130100 */
"icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\000000"
-/* offset=130328 */
+/* offset=130168 */
"insn_per_cycle\000Default\000instructions / cpu\\-cycles\000insn_per_cycle < 1\000Instructions Per Cycle\000\0001instructions\000\000\000\000001"
-/* offset=130441 */
+/* offset=130281 */
"itlb_miss_rate\000Default3\000iTLB\\-load\\-misses / iTLB\\-loads\000itlb_miss_rate > 0.05\000iTLB miss rate\000\000100%\000\000\000\000001"
-/* offset=130547 */
+/* offset=130387 */
"l1_prefetch_miss_rate\000Default4\000L1\\-dcache\\-prefetch\\-misses / L1\\-dcache\\-prefetches\000l1_prefetch_miss_rate > 0.05\000L1 prefetch miss rate\000\000100%\000\000\000\000001"
-/* offset=130695 */
+/* offset=130535 */
"l1d_miss_rate\000Default2\000L1\\-dcache\\-load\\-misses / L1\\-dcache\\-loads\000l1d_miss_rate > 0.05\000L1D miss rate\000\000100%\000\000\000\000001"
-/* offset=130811 */
+/* offset=130651 */
"l1i_miss_rate\000Default3\000L1\\-icache\\-load\\-misses / L1\\-icache\\-loads\000l1i_miss_rate > 0.05\000L1I miss rate\000\000100%\000\000\000\000001"
-/* offset=130926 */
+/* offset=130766 */
"llc_miss_rate\000Default2\000LLC\\-load\\-misses / LLC\\-loads\000llc_miss_rate > 0.05\000LLC miss rate\000\000100%\000\000\000\000001"
-/* offset=131027 */
+/* offset=130867 */
"migrations_per_second\000Default\000software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Process migrations to a new CPU per CPU second\000\0001migrations/sec\000\000\000\000011"
-/* offset=131287 */
+/* offset=131127 */
"page_faults_per_second\000Default\000software@page\\-faults\\,name\\=page\\-faults@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Page faults per CPU second\000\0001faults/sec\000\000\000\000011"
-/* offset=131518 */
+/* offset=131358 */
"stalled_cycles_per_instruction\000Default\000(max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions if has_event(stalled\\-cycles\\-frontend) & has_event(stalled\\-cycles\\-backend) else (stalled\\-cycles\\-frontend / instructions if has_event(stalled\\-cycles\\-frontend) else (stalled\\-cycles\\-backend / instructions if has_event(stalled\\-cycles\\-backend) else 0)))\000\000Max front or backend stalls per instruction\000\000\000\000\000\000001"
;
@@ -3259,1865 +3237,1865 @@ static const struct compact_pmu_event pmu_events__common_default_core[] = {
/* data-tlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-c... */
{ 29578 },
/* dtlb\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\0001... */
- { 29815 },
+ { 29802 },
/* dtlb-access\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\0... */
- { 29886 },
+ { 29873 },
/* dtlb-load\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000... */
- { 29964 },
+ { 29951 },
/* dtlb-load-access\000legacy cache\000Data TLB read accesses\000legacy-cache-confi... */
- { 30040 },
+ { 30027 },
/* dtlb-load-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x... */
- { 30123 },
+ { 30110 },
/* dtlb-load-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=... */
- { 30208 },
+ { 30195 },
/* dtlb-load-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3... */
- { 30295 },
+ { 30282 },
/* dtlb-load-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-co... */
- { 30375 },
+ { 30362 },
/* dtlb-load-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=... */
- { 30461 },
+ { 30448 },
/* dtlb-loads\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\00... */
- { 30542 },
+ { 30529 },
/* dtlb-loads-access\000legacy cache\000Data TLB read accesses\000legacy-cache-conf... */
- { 30619 },
+ { 30606 },
/* dtlb-loads-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0... */
- { 30703 },
+ { 30690 },
/* dtlb-loads-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config... */
- { 30789 },
+ { 30776 },
/* dtlb-loads-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=... */
- { 30877 },
+ { 30864 },
/* dtlb-loads-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-c... */
- { 30958 },
+ { 30945 },
/* dtlb-loads-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config... */
- { 31045 },
+ { 31032 },
/* dtlb-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x10003... */
- { 31127 },
+ { 31114 },
/* dtlb-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x100... */
- { 31207 },
+ { 31194 },
/* dtlb-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000\... */
- { 31289 },
+ { 31276 },
/* dtlb-prefetch\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-conf... */
- { 31364 },
+ { 31351 },
/* dtlb-prefetch-access\000legacy cache\000Data TLB prefetch accesses\000legacy-cac... */
- { 31452 },
+ { 31439 },
/* dtlb-prefetch-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache-c... */
- { 31547 },
+ { 31534 },
/* dtlb-prefetch-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cache... */
- { 31640 },
+ { 31627 },
/* dtlb-prefetch-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-... */
- { 31735 },
+ { 31722 },
/* dtlb-prefetch-reference\000legacy cache\000Data TLB prefetch accesses\000legacy-... */
- { 31827 },
+ { 31814 },
/* dtlb-prefetch-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cache... */
- { 31925 },
+ { 31912 },
/* dtlb-prefetches\000legacy cache\000Data TLB prefetch accesses\000legacy-cache-co... */
- { 32018 },
+ { 32005 },
/* dtlb-prefetches-access\000legacy cache\000Data TLB prefetch accesses\000legacy-c... */
- { 32108 },
+ { 32095 },
/* dtlb-prefetches-miss\000legacy cache\000Data TLB prefetch misses\000legacy-cache... */
- { 32205 },
+ { 32192 },
/* dtlb-prefetches-misses\000legacy cache\000Data TLB prefetch misses\000legacy-cac... */
- { 32300 },
+ { 32287 },
/* dtlb-prefetches-ops\000legacy cache\000Data TLB prefetch accesses\000legacy-cach... */
- { 32397 },
+ { 32384 },
/* dtlb-prefetches-reference\000legacy cache\000Data TLB prefetch accesses\000legac... */
- { 32491 },
+ { 32478 },
/* dtlb-prefetches-refs\000legacy cache\000Data TLB prefetch accesses\000legacy-cac... */
- { 32591 },
+ { 32578 },
/* dtlb-read\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000... */
- { 32686 },
+ { 32673 },
/* dtlb-read-access\000legacy cache\000Data TLB read accesses\000legacy-cache-confi... */
- { 32762 },
+ { 32749 },
/* dtlb-read-miss\000legacy cache\000Data TLB read misses\000legacy-cache-config=0x... */
- { 32845 },
+ { 32832 },
/* dtlb-read-misses\000legacy cache\000Data TLB read misses\000legacy-cache-config=... */
- { 32930 },
+ { 32917 },
/* dtlb-read-ops\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3... */
- { 33017 },
+ { 33004 },
/* dtlb-read-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-co... */
- { 33097 },
+ { 33084 },
/* dtlb-read-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=... */
- { 33183 },
+ { 33170 },
/* dtlb-reference\000legacy cache\000Data TLB read accesses\000legacy-cache-config=... */
- { 33264 },
+ { 33251 },
/* dtlb-refs\000legacy cache\000Data TLB read accesses\000legacy-cache-config=3\000... */
- { 33345 },
+ { 33332 },
/* dtlb-speculative-load\000legacy cache\000Data TLB prefetch accesses\000legacy-ca... */
- { 33421 },
+ { 33408 },
/* dtlb-speculative-load-access\000legacy cache\000Data TLB prefetch accesses\000le... */
- { 33517 },
+ { 33504 },
/* dtlb-speculative-load-miss\000legacy cache\000Data TLB prefetch misses\000legacy... */
- { 33620 },
+ { 33607 },
/* dtlb-speculative-load-misses\000legacy cache\000Data TLB prefetch misses\000lega... */
- { 33721 },
+ { 33708 },
/* dtlb-speculative-load-ops\000legacy cache\000Data TLB prefetch accesses\000legac... */
- { 33824 },
+ { 33811 },
/* dtlb-speculative-load-reference\000legacy cache\000Data TLB prefetch accesses\00... */
- { 33924 },
+ { 33911 },
/* dtlb-speculative-load-refs\000legacy cache\000Data TLB prefetch accesses\000lega... */
- { 34030 },
+ { 34017 },
/* dtlb-speculative-read\000legacy cache\000Data TLB prefetch accesses\000legacy-ca... */
- { 34131 },
+ { 34118 },
/* dtlb-speculative-read-access\000legacy cache\000Data TLB prefetch accesses\000le... */
- { 34227 },
+ { 34214 },
/* dtlb-speculative-read-miss\000legacy cache\000Data TLB prefetch misses\000legacy... */
- { 34330 },
+ { 34317 },
/* dtlb-speculative-read-misses\000legacy cache\000Data TLB prefetch misses\000lega... */
- { 34431 },
+ { 34418 },
/* dtlb-speculative-read-ops\000legacy cache\000Data TLB prefetch accesses\000legac... */
- { 34534 },
+ { 34521 },
/* dtlb-speculative-read-reference\000legacy cache\000Data TLB prefetch accesses\00... */
- { 34634 },
+ { 34621 },
/* dtlb-speculative-read-refs\000legacy cache\000Data TLB prefetch accesses\000lega... */
- { 34740 },
+ { 34727 },
/* dtlb-store\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x1... */
- { 34841 },
+ { 34828 },
/* dtlb-store-access\000legacy cache\000Data TLB write accesses\000legacy-cache-con... */
- { 34923 },
+ { 34910 },
/* dtlb-store-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=... */
- { 35012 },
+ { 34999 },
/* dtlb-store-misses\000legacy cache\000Data TLB write misses\000legacy-cache-confi... */
- { 35099 },
+ { 35086 },
/* dtlb-store-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config... */
- { 35188 },
+ { 35175 },
/* dtlb-store-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-... */
- { 35274 },
+ { 35261 },
/* dtlb-store-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-confi... */
- { 35366 },
+ { 35353 },
/* dtlb-stores\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x... */
- { 35453 },
+ { 35440 },
/* dtlb-stores-access\000legacy cache\000Data TLB write accesses\000legacy-cache-co... */
- { 35536 },
+ { 35523 },
/* dtlb-stores-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config... */
- { 35626 },
+ { 35613 },
/* dtlb-stores-misses\000legacy cache\000Data TLB write misses\000legacy-cache-conf... */
- { 35714 },
+ { 35701 },
/* dtlb-stores-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-confi... */
- { 35804 },
+ { 35791 },
/* dtlb-stores-reference\000legacy cache\000Data TLB write accesses\000legacy-cache... */
- { 35891 },
+ { 35878 },
/* dtlb-stores-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-conf... */
- { 35984 },
+ { 35971 },
/* dtlb-write\000legacy cache\000Data TLB write accesses\000legacy-cache-config=0x1... */
- { 36072 },
+ { 36059 },
/* dtlb-write-access\000legacy cache\000Data TLB write accesses\000legacy-cache-con... */
- { 36154 },
+ { 36141 },
/* dtlb-write-miss\000legacy cache\000Data TLB write misses\000legacy-cache-config=... */
- { 36243 },
+ { 36230 },
/* dtlb-write-misses\000legacy cache\000Data TLB write misses\000legacy-cache-confi... */
- { 36330 },
+ { 36317 },
/* dtlb-write-ops\000legacy cache\000Data TLB write accesses\000legacy-cache-config... */
- { 36419 },
+ { 36406 },
/* dtlb-write-reference\000legacy cache\000Data TLB write accesses\000legacy-cache-... */
- { 36505 },
+ { 36492 },
/* dtlb-write-refs\000legacy cache\000Data TLB write accesses\000legacy-cache-confi... */
- { 36597 },
+ { 36584 },
/* i-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\... */
- { 37397 },
+ { 37355 },
/* i-tlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-co... */
- { 37476 },
+ { 37434 },
/* i-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-conf... */
- { 37562 },
+ { 37520 },
/* i-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cac... */
- { 37646 },
+ { 37604 },
/* i-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-c... */
- { 37737 },
+ { 37695 },
/* i-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache... */
- { 37830 },
+ { 37788 },
/* i-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-... */
- { 37925 },
+ { 37883 },
/* i-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-... */
- { 38013 },
+ { 37971 },
/* i-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache... */
- { 38107 },
+ { 38065 },
/* i-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-con... */
- { 38196 },
+ { 38154 },
/* i-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-ca... */
- { 38281 },
+ { 38239 },
/* i-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-... */
- { 38373 },
+ { 38331 },
/* i-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cach... */
- { 38467 },
+ { 38425 },
/* i-tlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache... */
- { 38563 },
+ { 38521 },
/* i-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy... */
- { 38652 },
+ { 38610 },
/* i-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cach... */
- { 38747 },
+ { 38705 },
/* i-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config... */
- { 38837 },
+ { 38795 },
/* i-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-conf... */
- { 38925 },
+ { 38883 },
/* i-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-confi... */
- { 39015 },
+ { 38973 },
/* i-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-conf... */
- { 39098 },
+ { 39056 },
/* i-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cac... */
- { 39182 },
+ { 39140 },
/* i-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-c... */
- { 39273 },
+ { 39231 },
/* i-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache... */
- { 39366 },
+ { 39324 },
/* i-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-... */
- { 39461 },
+ { 39419 },
/* i-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-... */
- { 39549 },
+ { 39507 },
/* i-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache... */
- { 39643 },
+ { 39601 },
/* i-tlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache... */
- { 39732 },
+ { 39690 },
/* i-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-conf... */
- { 39821 },
+ { 39779 },
/* idle-cycles-backend\000legacy hardware\000Stalled cycles during retirement [This... */
- { 39905 },
+ { 39863 },
/* idle-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This eve... */
- { 40058 },
+ { 40016 },
/* instruction-tlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache... */
- { 40208 },
+ { 40166 },
/* instruction-tlb-access\000legacy cache\000Instruction TLB read accesses\000legac... */
- { 40297 },
+ { 40255 },
/* instruction-tlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-... */
- { 40393 },
+ { 40351 },
/* instruction-tlb-load-access\000legacy cache\000Instruction TLB read accesses\000... */
- { 40487 },
+ { 40445 },
/* instruction-tlb-load-miss\000legacy cache\000Instruction TLB read misses\000lega... */
- { 40588 },
+ { 40546 },
/* instruction-tlb-load-misses\000legacy cache\000Instruction TLB read misses\000le... */
- { 40691 },
+ { 40649 },
/* instruction-tlb-load-ops\000legacy cache\000Instruction TLB read accesses\000leg... */
- { 40796 },
+ { 40754 },
/* instruction-tlb-load-reference\000legacy cache\000Instruction TLB read accesses\... */
- { 40894 },
+ { 40852 },
/* instruction-tlb-load-refs\000legacy cache\000Instruction TLB read accesses\000le... */
- { 40998 },
+ { 40956 },
/* instruction-tlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy... */
- { 41097 },
+ { 41055 },
/* instruction-tlb-loads-access\000legacy cache\000Instruction TLB read accesses\00... */
- { 41192 },
+ { 41150 },
/* instruction-tlb-loads-miss\000legacy cache\000Instruction TLB read misses\000leg... */
- { 41294 },
+ { 41252 },
/* instruction-tlb-loads-misses\000legacy cache\000Instruction TLB read misses\000l... */
- { 41398 },
+ { 41356 },
/* instruction-tlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000le... */
- { 41504 },
+ { 41462 },
/* instruction-tlb-loads-reference\000legacy cache\000Instruction TLB read accesses... */
- { 41603 },
+ { 41561 },
/* instruction-tlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000l... */
- { 41708 },
+ { 41666 },
/* instruction-tlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-ca... */
- { 41808 },
+ { 41766 },
/* instruction-tlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-... */
- { 41906 },
+ { 41864 },
/* instruction-tlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-c... */
- { 42006 },
+ { 41964 },
/* instruction-tlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-... */
- { 42099 },
+ { 42057 },
/* instruction-tlb-read-access\000legacy cache\000Instruction TLB read accesses\000... */
- { 42193 },
+ { 42151 },
/* instruction-tlb-read-miss\000legacy cache\000Instruction TLB read misses\000lega... */
- { 42294 },
+ { 42252 },
/* instruction-tlb-read-misses\000legacy cache\000Instruction TLB read misses\000le... */
- { 42397 },
+ { 42355 },
/* instruction-tlb-read-ops\000legacy cache\000Instruction TLB read accesses\000leg... */
- { 42502 },
+ { 42460 },
/* instruction-tlb-read-reference\000legacy cache\000Instruction TLB read accesses\... */
- { 42600 },
+ { 42558 },
/* instruction-tlb-read-refs\000legacy cache\000Instruction TLB read accesses\000le... */
- { 42704 },
+ { 42662 },
/* instruction-tlb-reference\000legacy cache\000Instruction TLB read accesses\000le... */
- { 42803 },
+ { 42761 },
/* instruction-tlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-... */
- { 42902 },
+ { 42860 },
/* instructions\000legacy hardware\000Retired instructions. Be careful, these can b... */
- { 42996 },
+ { 42954 },
/* itlb\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config=4\0... */
- { 43172 },
+ { 43130 },
/* itlb-access\000legacy cache\000Instruction TLB read accesses\000legacy-cache-con... */
- { 43250 },
+ { 43208 },
/* itlb-load\000legacy cache\000Instruction TLB read accesses\000legacy-cache-confi... */
- { 43335 },
+ { 43293 },
/* itlb-load-access\000legacy cache\000Instruction TLB read accesses\000legacy-cach... */
- { 43418 },
+ { 43376 },
/* itlb-load-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-co... */
- { 43508 },
+ { 43466 },
/* itlb-load-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-... */
- { 43600 },
+ { 43558 },
/* itlb-load-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-c... */
- { 43694 },
+ { 43652 },
/* itlb-load-reference\000legacy cache\000Instruction TLB read accesses\000legacy-c... */
- { 43781 },
+ { 43739 },
/* itlb-load-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-... */
- { 43874 },
+ { 43832 },
/* itlb-loads\000legacy cache\000Instruction TLB read accesses\000legacy-cache-conf... */
- { 43962 },
+ { 43920 },
/* itlb-loads-access\000legacy cache\000Instruction TLB read accesses\000legacy-cac... */
- { 44046 },
+ { 44004 },
/* itlb-loads-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-c... */
- { 44137 },
+ { 44095 },
/* itlb-loads-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache... */
- { 44230 },
+ { 44188 },
/* itlb-loads-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-... */
- { 44325 },
+ { 44283 },
/* itlb-loads-reference\000legacy cache\000Instruction TLB read accesses\000legacy-... */
- { 44413 },
+ { 44371 },
/* itlb-loads-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache... */
- { 44507 },
+ { 44465 },
/* itlb-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-config=... */
- { 44596 },
+ { 44554 },
/* itlb-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-confi... */
- { 44683 },
+ { 44641 },
/* itlb-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-config... */
- { 44772 },
+ { 44730 },
/* itlb-read\000legacy cache\000Instruction TLB read accesses\000legacy-cache-confi... */
- { 44854 },
+ { 44812 },
/* itlb-read-access\000legacy cache\000Instruction TLB read accesses\000legacy-cach... */
- { 44937 },
+ { 44895 },
/* itlb-read-miss\000legacy cache\000Instruction TLB read misses\000legacy-cache-co... */
- { 45027 },
+ { 44985 },
/* itlb-read-misses\000legacy cache\000Instruction TLB read misses\000legacy-cache-... */
- { 45119 },
+ { 45077 },
/* itlb-read-ops\000legacy cache\000Instruction TLB read accesses\000legacy-cache-c... */
- { 45213 },
+ { 45171 },
/* itlb-read-reference\000legacy cache\000Instruction TLB read accesses\000legacy-c... */
- { 45300 },
+ { 45258 },
/* itlb-read-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-... */
- { 45393 },
+ { 45351 },
/* itlb-reference\000legacy cache\000Instruction TLB read accesses\000legacy-cache-... */
- { 45481 },
+ { 45439 },
/* itlb-refs\000legacy cache\000Instruction TLB read accesses\000legacy-cache-confi... */
- { 45569 },
+ { 45527 },
/* l1-d\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-config=... */
- { 45652 },
+ { 45610 },
/* l1-d-access\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-... */
- { 45733 },
+ { 45691 },
/* l1-d-load\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-co... */
- { 45821 },
+ { 45779 },
/* l1-d-load-access\000legacy cache\000Level 1 data cache read accesses\000legacy-c... */
- { 45907 },
+ { 45865 },
/* l1-d-load-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache... */
- { 46000 },
+ { 45958 },
/* l1-d-load-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cac... */
- { 46095 },
+ { 46053 },
/* l1-d-load-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cach... */
- { 46192 },
+ { 46150 },
/* l1-d-load-reference\000legacy cache\000Level 1 data cache read accesses\000legac... */
- { 46282 },
+ { 46240 },
/* l1-d-load-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-cac... */
- { 46378 },
+ { 46336 },
/* l1-d-loads\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-c... */
- { 46469 },
+ { 46427 },
/* l1-d-loads-access\000legacy cache\000Level 1 data cache read accesses\000legacy-... */
- { 46556 },
+ { 46514 },
/* l1-d-loads-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cach... */
- { 46650 },
+ { 46608 },
/* l1-d-loads-misses\000legacy cache\000Level 1 data cache read misses\000legacy-ca... */
- { 46746 },
+ { 46704 },
/* l1-d-loads-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cac... */
- { 46844 },
+ { 46802 },
/* l1-d-loads-reference\000legacy cache\000Level 1 data cache read accesses\000lega... */
- { 46935 },
+ { 46893 },
/* l1-d-loads-refs\000legacy cache\000Level 1 data cache read accesses\000legacy-ca... */
- { 47032 },
+ { 46990 },
/* l1-d-miss\000legacy cache\000Level 1 data cache read misses\000legacy-cache-conf... */
- { 47124 },
+ { 47082 },
/* l1-d-misses\000legacy cache\000Level 1 data cache read misses\000legacy-cache-co... */
- { 47214 },
+ { 47172 },
/* l1-d-ops\000legacy cache\000Level 1 data cache read accesses\000legacy-cache-con... */
- { 47306 },
+ { 47264 },
/* l1-d-prefetch\000legacy cache\000Level 1 data cache prefetch accesses\000legacy-... */
- { 47391 },
+ { 47349 },
/* l1-d-prefetch-access\000legacy cache\000Level 1 data cache prefetch accesses\000... */
- { 47489 },
+ { 47447 },
/* l1-d-prefetch-miss\000legacy cache\000Level 1 data cache prefetch misses\000lega... */
- { 47594 },
+ { 47552 },
/* l1-d-prefetch-misses\000legacy cache\000Level 1 data cache prefetch misses\000le... */
- { 47697 },
+ { 47655 },
/* l1-d-prefetch-ops\000legacy cache\000Level 1 data cache prefetch accesses\000leg... */
- { 47802 },
+ { 47760 },
/* l1-d-prefetch-reference\000legacy cache\000Level 1 data cache prefetch accesses\... */
- { 47904 },
+ { 47862 },
/* l1-d-prefetch-refs\000legacy cache\000Level 1 data cache prefetch accesses\000le... */
- { 48012 },
+ { 47970 },
/* l1-d-prefetches\000legacy cache\000Level 1 data cache prefetch accesses\000legac... */
- { 48115 },
+ { 48073 },
/* l1-d-prefetches-access\000legacy cache\000Level 1 data cache prefetch accesses\0... */
- { 48215 },
+ { 48173 },
/* l1-d-prefetches-miss\000legacy cache\000Level 1 data cache prefetch misses\000le... */
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- { 105713 },
+ { 105671 },
/* l2-read-refs\000legacy cache\000Level 2 (or higher) last level cache read access... */
- { 105825 },
+ { 105783 },
/* l2-reference\000legacy cache\000Level 2 (or higher) last level cache read access... */
- { 105932 },
+ { 105890 },
/* l2-refs\000legacy cache\000Level 2 (or higher) last level cache read accesses\00... */
- { 106039 },
+ { 105997 },
/* l2-speculative-load\000legacy cache\000Level 2 (or higher) last level cache pref... */
- { 106141 },
+ { 106099 },
/* l2-speculative-load-access\000legacy cache\000Level 2 (or higher) last level cac... */
- { 106263 },
+ { 106221 },
/* l2-speculative-load-miss\000legacy cache\000Level 2 (or higher) last level cache... */
- { 106392 },
+ { 106350 },
/* l2-speculative-load-misses\000legacy cache\000Level 2 (or higher) last level cac... */
- { 106519 },
+ { 106477 },
/* l2-speculative-load-ops\000legacy cache\000Level 2 (or higher) last level cache ... */
- { 106648 },
+ { 106606 },
/* l2-speculative-load-reference\000legacy cache\000Level 2 (or higher) last level ... */
- { 106774 },
+ { 106732 },
/* l2-speculative-load-refs\000legacy cache\000Level 2 (or higher) last level cache... */
- { 106906 },
+ { 106864 },
/* l2-speculative-read\000legacy cache\000Level 2 (or higher) last level cache pref... */
- { 107033 },
+ { 106991 },
/* l2-speculative-read-access\000legacy cache\000Level 2 (or higher) last level cac... */
- { 107155 },
+ { 107113 },
/* l2-speculative-read-miss\000legacy cache\000Level 2 (or higher) last level cache... */
- { 107284 },
+ { 107242 },
/* l2-speculative-read-misses\000legacy cache\000Level 2 (or higher) last level cac... */
- { 107411 },
+ { 107369 },
/* l2-speculative-read-ops\000legacy cache\000Level 2 (or higher) last level cache ... */
- { 107540 },
+ { 107498 },
/* l2-speculative-read-reference\000legacy cache\000Level 2 (or higher) last level ... */
- { 107666 },
+ { 107624 },
/* l2-speculative-read-refs\000legacy cache\000Level 2 (or higher) last level cache... */
- { 107798 },
+ { 107756 },
/* l2-store\000legacy cache\000Level 2 (or higher) last level cache write accesses\... */
- { 107925 },
+ { 107883 },
/* l2-store-access\000legacy cache\000Level 2 (or higher) last level cache write ac... */
- { 108033 },
+ { 107991 },
/* l2-store-miss\000legacy cache\000Level 2 (or higher) last level cache write miss... */
- { 108148 },
+ { 108106 },
/* l2-store-misses\000legacy cache\000Level 2 (or higher) last level cache write mi... */
- { 108261 },
+ { 108219 },
/* l2-store-ops\000legacy cache\000Level 2 (or higher) last level cache write acces... */
- { 108376 },
+ { 108334 },
/* l2-store-reference\000legacy cache\000Level 2 (or higher) last level cache write... */
- { 108488 },
+ { 108446 },
/* l2-store-refs\000legacy cache\000Level 2 (or higher) last level cache write acce... */
- { 108606 },
+ { 108564 },
/* l2-stores\000legacy cache\000Level 2 (or higher) last level cache write accesses... */
- { 108719 },
+ { 108677 },
/* l2-stores-access\000legacy cache\000Level 2 (or higher) last level cache write a... */
- { 108828 },
+ { 108786 },
/* l2-stores-miss\000legacy cache\000Level 2 (or higher) last level cache write mis... */
- { 108944 },
+ { 108902 },
/* l2-stores-misses\000legacy cache\000Level 2 (or higher) last level cache write m... */
- { 109058 },
+ { 109016 },
/* l2-stores-ops\000legacy cache\000Level 2 (or higher) last level cache write acce... */
- { 109174 },
+ { 109132 },
/* l2-stores-reference\000legacy cache\000Level 2 (or higher) last level cache writ... */
- { 109287 },
+ { 109245 },
/* l2-stores-refs\000legacy cache\000Level 2 (or higher) last level cache write acc... */
- { 109406 },
+ { 109364 },
/* l2-write\000legacy cache\000Level 2 (or higher) last level cache write accesses\... */
- { 109520 },
+ { 109478 },
/* l2-write-access\000legacy cache\000Level 2 (or higher) last level cache write ac... */
- { 109628 },
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/* l2-write-miss\000legacy cache\000Level 2 (or higher) last level cache write miss... */
- { 109743 },
+ { 109701 },
/* l2-write-misses\000legacy cache\000Level 2 (or higher) last level cache write mi... */
- { 109856 },
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/* l2-write-ops\000legacy cache\000Level 2 (or higher) last level cache write acces... */
- { 109971 },
+ { 109929 },
/* l2-write-reference\000legacy cache\000Level 2 (or higher) last level cache write... */
- { 110083 },
+ { 110041 },
/* l2-write-refs\000legacy cache\000Level 2 (or higher) last level cache write acce... */
- { 110201 },
+ { 110159 },
/* llc\000legacy cache\000Last level cache read accesses\000legacy-cache-config=2\0... */
- { 110412 },
+ { 110370 },
/* llc-access\000legacy cache\000Last level cache read accesses\000legacy-cache-con... */
- { 110490 },
+ { 110448 },
/* llc-load\000legacy cache\000Last level cache read accesses\000legacy-cache-confi... */
- { 110575 },
+ { 110533 },
/* llc-load-access\000legacy cache\000Last level cache read accesses\000legacy-cach... */
- { 110658 },
+ { 110616 },
/* llc-load-miss\000legacy cache\000Last level cache read misses\000legacy-cache-co... */
- { 110748 },
+ { 110706 },
/* llc-load-misses\000legacy cache\000Last level cache read misses\000legacy-cache-... */
- { 110840 },
+ { 110798 },
/* llc-load-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-c... */
- { 110934 },
+ { 110892 },
/* llc-load-reference\000legacy cache\000Last level cache read accesses\000legacy-c... */
- { 111021 },
+ { 110979 },
/* llc-load-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-... */
- { 111114 },
+ { 111072 },
/* llc-loads\000legacy cache\000Last level cache read accesses\000legacy-cache-conf... */
- { 111202 },
+ { 111160 },
/* llc-loads-access\000legacy cache\000Last level cache read accesses\000legacy-cac... */
- { 111286 },
+ { 111244 },
/* llc-loads-miss\000legacy cache\000Last level cache read misses\000legacy-cache-c... */
- { 111377 },
+ { 111335 },
/* llc-loads-misses\000legacy cache\000Last level cache read misses\000legacy-cache... */
- { 111470 },
+ { 111428 },
/* llc-loads-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-... */
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/* llc-loads-reference\000legacy cache\000Last level cache read accesses\000legacy-... */
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/* llc-loads-refs\000legacy cache\000Last level cache read accesses\000legacy-cache... */
- { 111747 },
+ { 111705 },
/* llc-miss\000legacy cache\000Last level cache read misses\000legacy-cache-config=... */
- { 111836 },
+ { 111794 },
/* llc-misses\000legacy cache\000Last level cache read misses\000legacy-cache-confi... */
- { 111923 },
+ { 111881 },
/* llc-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-config... */
- { 112012 },
+ { 111970 },
/* llc-prefetch\000legacy cache\000Last level cache prefetch accesses\000legacy-cac... */
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/* llc-prefetch-access\000legacy cache\000Last level cache prefetch accesses\000leg... */
- { 112189 },
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/* llc-prefetch-miss\000legacy cache\000Last level cache prefetch misses\000legacy-... */
- { 112291 },
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/* llc-prefetch-misses\000legacy cache\000Last level cache prefetch misses\000legac... */
- { 112391 },
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/* llc-prefetch-ops\000legacy cache\000Last level cache prefetch accesses\000legacy... */
- { 112493 },
+ { 112451 },
/* llc-prefetch-reference\000legacy cache\000Last level cache prefetch accesses\000... */
- { 112592 },
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/* llc-prefetch-refs\000legacy cache\000Last level cache prefetch accesses\000legac... */
- { 112697 },
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/* llc-prefetches\000legacy cache\000Last level cache prefetch accesses\000legacy-c... */
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/* llc-prefetches-access\000legacy cache\000Last level cache prefetch accesses\000l... */
- { 112894 },
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/* llc-prefetches-miss\000legacy cache\000Last level cache prefetch misses\000legac... */
- { 112998 },
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/* llc-prefetches-misses\000legacy cache\000Last level cache prefetch misses\000leg... */
- { 113100 },
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/* llc-prefetches-ops\000legacy cache\000Last level cache prefetch accesses\000lega... */
- { 113204 },
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/* llc-prefetches-reference\000legacy cache\000Last level cache prefetch accesses\0... */
- { 113305 },
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/* llc-prefetches-refs\000legacy cache\000Last level cache prefetch accesses\000leg... */
- { 113412 },
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/* llc-read\000legacy cache\000Last level cache read accesses\000legacy-cache-confi... */
- { 113514 },
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/* llc-read-access\000legacy cache\000Last level cache read accesses\000legacy-cach... */
- { 113597 },
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/* llc-read-miss\000legacy cache\000Last level cache read misses\000legacy-cache-co... */
- { 113687 },
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/* llc-read-misses\000legacy cache\000Last level cache read misses\000legacy-cache-... */
- { 113779 },
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/* llc-read-ops\000legacy cache\000Last level cache read accesses\000legacy-cache-c... */
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/* llc-read-reference\000legacy cache\000Last level cache read accesses\000legacy-c... */
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/* llc-read-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-... */
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/* llc-reference\000legacy cache\000Last level cache read accesses\000legacy-cache-... */
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/* llc-refs\000legacy cache\000Last level cache read accesses\000legacy-cache-confi... */
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/* llc-speculative-load\000legacy cache\000Last level cache prefetch accesses\000le... */
- { 114312 },
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/* llc-speculative-load-access\000legacy cache\000Last level cache prefetch accesse... */
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/* llc-speculative-load-miss\000legacy cache\000Last level cache prefetch misses\00... */
- { 114525 },
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/* llc-speculative-load-misses\000legacy cache\000Last level cache prefetch misses\... */
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/* llc-speculative-load-ops\000legacy cache\000Last level cache prefetch accesses\0... */
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/* llc-speculative-load-reference\000legacy cache\000Last level cache prefetch acce... */
- { 114850 },
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/* llc-speculative-load-refs\000legacy cache\000Last level cache prefetch accesses\... */
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/* llc-speculative-read\000legacy cache\000Last level cache prefetch accesses\000le... */
- { 115071 },
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/* llc-speculative-read-access\000legacy cache\000Last level cache prefetch accesse... */
- { 115174 },
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/* llc-speculative-read-miss\000legacy cache\000Last level cache prefetch misses\00... */
- { 115284 },
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/* llc-speculative-read-misses\000legacy cache\000Last level cache prefetch misses\... */
- { 115392 },
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/* llc-speculative-read-ops\000legacy cache\000Last level cache prefetch accesses\0... */
- { 115502 },
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/* llc-speculative-read-reference\000legacy cache\000Last level cache prefetch acce... */
- { 115609 },
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/* llc-speculative-read-refs\000legacy cache\000Last level cache prefetch accesses\... */
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/* llc-store\000legacy cache\000Last level cache write accesses\000legacy-cache-con... */
- { 115830 },
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/* llc-store-access\000legacy cache\000Last level cache write accesses\000legacy-ca... */
- { 115919 },
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/* llc-store-miss\000legacy cache\000Last level cache write misses\000legacy-cache-... */
- { 116015 },
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/* llc-store-misses\000legacy cache\000Last level cache write misses\000legacy-cach... */
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/* llc-store-ops\000legacy cache\000Last level cache write accesses\000legacy-cache... */
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/* llc-store-reference\000legacy cache\000Last level cache write accesses\000legacy... */
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/* llc-store-refs\000legacy cache\000Last level cache write accesses\000legacy-cach... */
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/* llc-stores\000legacy cache\000Last level cache write accesses\000legacy-cache-co... */
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/* llc-stores-access\000legacy cache\000Last level cache write accesses\000legacy-c... */
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/* llc-stores-miss\000legacy cache\000Last level cache write misses\000legacy-cache... */
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/* llc-stores-misses\000legacy cache\000Last level cache write misses\000legacy-cac... */
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/* llc-stores-ops\000legacy cache\000Last level cache write accesses\000legacy-cach... */
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/* llc-stores-reference\000legacy cache\000Last level cache write accesses\000legac... */
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/* llc-stores-refs\000legacy cache\000Last level cache write accesses\000legacy-cac... */
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/* llc-write\000legacy cache\000Last level cache write accesses\000legacy-cache-con... */
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/* llc-write-access\000legacy cache\000Last level cache write accesses\000legacy-ca... */
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/* llc-write-miss\000legacy cache\000Last level cache write misses\000legacy-cache-... */
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/* llc-write-misses\000legacy cache\000Last level cache write misses\000legacy-cach... */
- { 117438 },
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/* llc-write-ops\000legacy cache\000Last level cache write accesses\000legacy-cache... */
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/* llc-write-reference\000legacy cache\000Last level cache write accesses\000legacy... */
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/* llc-write-refs\000legacy cache\000Last level cache write accesses\000legacy-cach... */
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/* node\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\000\... */
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/* node-access\000legacy cache\000Local memory read accesses\000legacy-cache-config... */
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/* node-load\000legacy cache\000Local memory read accesses\000legacy-cache-config=6... */
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/* node-load-access\000legacy cache\000Local memory read accesses\000legacy-cache-c... */
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/* node-load-miss\000legacy cache\000Local memory read misses\000legacy-cache-confi... */
- { 118488 },
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/* node-load-misses\000legacy cache\000Local memory read misses\000legacy-cache-con... */
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/* node-load-ops\000legacy cache\000Local memory read accesses\000legacy-cache-conf... */
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/* node-load-reference\000legacy cache\000Local memory read accesses\000legacy-cach... */
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/* node-load-refs\000legacy cache\000Local memory read accesses\000legacy-cache-con... */
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/* node-loads\000legacy cache\000Local memory read accesses\000legacy-cache-config=... */
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/* node-loads-access\000legacy cache\000Local memory read accesses\000legacy-cache-... */
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/* node-loads-miss\000legacy cache\000Local memory read misses\000legacy-cache-conf... */
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/* node-loads-misses\000legacy cache\000Local memory read misses\000legacy-cache-co... */
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/* node-loads-ops\000legacy cache\000Local memory read accesses\000legacy-cache-con... */
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/* node-loads-reference\000legacy cache\000Local memory read accesses\000legacy-cac... */
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/* node-loads-refs\000legacy cache\000Local memory read accesses\000legacy-cache-co... */
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/* node-miss\000legacy cache\000Local memory read misses\000legacy-cache-config=0x1... */
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/* node-misses\000legacy cache\000Local memory read misses\000legacy-cache-config=0... */
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/* node-ops\000legacy cache\000Local memory read accesses\000legacy-cache-config=6\... */
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/* node-prefetch-access\000legacy cache\000Local memory prefetch accesses\000legacy... */
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/* node-prefetch-miss\000legacy cache\000Local memory prefetch misses\000legacy-cac... */
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/* node-prefetch-misses\000legacy cache\000Local memory prefetch misses\000legacy-c... */
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/* node-prefetch-ops\000legacy cache\000Local memory prefetch accesses\000legacy-ca... */
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/* node-prefetch-reference\000legacy cache\000Local memory prefetch accesses\000leg... */
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/* node-prefetch-refs\000legacy cache\000Local memory prefetch accesses\000legacy-c... */
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/* node-prefetches-ops\000legacy cache\000Local memory prefetch accesses\000legacy-... */
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/* node-prefetches-refs\000legacy cache\000Local memory prefetch accesses\000legacy... */
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/* node-read-access\000legacy cache\000Local memory read accesses\000legacy-cache-c... */
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/* node-read-miss\000legacy cache\000Local memory read misses\000legacy-cache-confi... */
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/* node-read-misses\000legacy cache\000Local memory read misses\000legacy-cache-con... */
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/* node-read-ops\000legacy cache\000Local memory read accesses\000legacy-cache-conf... */
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/* node-read-reference\000legacy cache\000Local memory read accesses\000legacy-cach... */
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/* node-reference\000legacy cache\000Local memory read accesses\000legacy-cache-con... */
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/* node-speculative-load-access\000legacy cache\000Local memory prefetch accesses\0... */
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/* node-speculative-load-misses\000legacy cache\000Local memory prefetch misses\000... */
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/* node-speculative-load-ops\000legacy cache\000Local memory prefetch accesses\000l... */
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/* node-speculative-load-reference\000legacy cache\000Local memory prefetch accesse... */
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/* node-speculative-load-refs\000legacy cache\000Local memory prefetch accesses\000... */
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/* node-speculative-read\000legacy cache\000Local memory prefetch accesses\000legac... */
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/* node-speculative-read-access\000legacy cache\000Local memory prefetch accesses\0... */
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/* node-speculative-read-miss\000legacy cache\000Local memory prefetch misses\000le... */
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/* node-speculative-read-misses\000legacy cache\000Local memory prefetch misses\000... */
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/* node-speculative-read-ops\000legacy cache\000Local memory prefetch accesses\000l... */
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/* node-speculative-read-reference\000legacy cache\000Local memory prefetch accesse... */
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/* node-speculative-read-refs\000legacy cache\000Local memory prefetch accesses\000... */
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/* node-store\000legacy cache\000Local memory write accesses\000legacy-cache-config... */
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/* node-store-access\000legacy cache\000Local memory write accesses\000legacy-cache... */
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/* node-store-miss\000legacy cache\000Local memory write misses\000legacy-cache-con... */
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/* node-store-misses\000legacy cache\000Local memory write misses\000legacy-cache-c... */
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/* node-store-ops\000legacy cache\000Local memory write accesses\000legacy-cache-co... */
- { 123777 },
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/* node-store-reference\000legacy cache\000Local memory write accesses\000legacy-ca... */
- { 123867 },
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/* node-store-refs\000legacy cache\000Local memory write accesses\000legacy-cache-c... */
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/* node-stores\000legacy cache\000Local memory write accesses\000legacy-cache-confi... */
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/* node-stores-access\000legacy cache\000Local memory write accesses\000legacy-cach... */
- { 124141 },
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/* node-stores-miss\000legacy cache\000Local memory write misses\000legacy-cache-co... */
- { 124235 },
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/* node-stores-misses\000legacy cache\000Local memory write misses\000legacy-cache-... */
- { 124327 },
+ { 124285 },
/* node-stores-ops\000legacy cache\000Local memory write accesses\000legacy-cache-c... */
- { 124421 },
+ { 124379 },
/* node-stores-reference\000legacy cache\000Local memory write accesses\000legacy-c... */
- { 124512 },
+ { 124470 },
/* node-stores-refs\000legacy cache\000Local memory write accesses\000legacy-cache-... */
- { 124609 },
+ { 124567 },
/* node-write\000legacy cache\000Local memory write accesses\000legacy-cache-config... */
- { 124701 },
+ { 124659 },
/* node-write-access\000legacy cache\000Local memory write accesses\000legacy-cache... */
- { 124787 },
+ { 124745 },
/* node-write-miss\000legacy cache\000Local memory write misses\000legacy-cache-con... */
- { 124880 },
+ { 124838 },
/* node-write-misses\000legacy cache\000Local memory write misses\000legacy-cache-c... */
- { 124971 },
+ { 124929 },
/* node-write-ops\000legacy cache\000Local memory write accesses\000legacy-cache-co... */
- { 125064 },
+ { 125022 },
/* node-write-reference\000legacy cache\000Local memory write accesses\000legacy-ca... */
- { 125154 },
+ { 125112 },
/* node-write-refs\000legacy cache\000Local memory write accesses\000legacy-cache-c... */
- { 125250 },
+ { 125208 },
/* ref-cycles\000legacy hardware\000Total cycles; not affected by CPU frequency sca... */
- { 125963 },
+ { 125921 },
/* stalled-cycles-backend\000legacy hardware\000Stalled cycles during retirement [T... */
- { 126403 },
+ { 126352 },
/* stalled-cycles-frontend\000legacy hardware\000Stalled cycles during issue [This ... */
- { 126556 },
+ { 126505 },
};
static const struct compact_pmu_event pmu_events__common_software[] = {
/* alignment-faults\000software\000Number of kernel handled memory alignment faults... */
@@ -5135,115 +5113,115 @@ static const struct compact_pmu_event pmu_events__common_software[] = {
/* cs\000software\000Number of context switches [This event is an alias of context-... */
{ 15283 },
/* dummy\000software\000A placeholder event that doesn't count anything\000config=9... */
- { 36684 },
+ { 36671 },
/* emulation-faults\000software\000Number of kernel handled unimplemented instructi... */
- { 36958 },
+ { 36945 },
/* faults\000software\000Number of page faults [This event is an alias of page-faul... */
- { 37197 },
+ { 37184 },
/* major-faults\000software\000Number of major page faults. Major faults require I/... */
- { 117820 },
+ { 117778 },
/* migrations\000software\000Number of times a process has migrated to a new CPU [T... */
- { 117923 },
+ { 117881 },
/* minor-faults\000software\000Number of minor page faults. Minor faults don't requ... */
- { 118055 },
+ { 118013 },
/* page-faults\000software\000Number of page faults [This event is an alias of faul... */
- { 125868 },
+ { 125826 },
/* task-clock\000software\000Per-task high-resolution timer based event\000config=1... */
- { 127253 },
+ { 127202 },
};
static const struct compact_pmu_event pmu_events__common_tool[] = {
/* core_wide\000tool\0001 if not SMT, if SMT are events being gathered on all SMT t... */
{ 14789 },
/* duration_time\000tool\000Wall clock interval time in nanoseconds\000config=1\000... */
- { 36764 },
+ { 36751 },
/* has_pmem\000tool\0001 if persistent memory installed otherwise 0\000config=4\000... */
- { 37292 },
+ { 37279 },
/* num_cores\000tool\000Number of cores. A core consists of 1 or more thread, with ... */
- { 125341 },
+ { 125299 },
/* num_cpus\000tool\000Number of logical Linux CPUs. There may be multiple such CPU... */
- { 125486 },
+ { 125444 },
/* num_cpus_online\000tool\000Number of online logical Linux CPUs. There may be mul... */
- { 125589 },
+ { 125547 },
/* num_dies\000tool\000Number of dies. Each die has 1 or more cores\000config=8\000... */
- { 125706 },
+ { 125664 },
/* num_packages\000tool\000Number of packages. Each package has 1 or more die\000co... */
- { 125782 },
+ { 125740 },
/* slots\000tool\000Number of functional units that in parallel can execute parts o... */
- { 126177 },
+ { 126135 },
/* smt_on\000tool\0001 if simultaneous multithreading (aka hyperthreading) is enabl... */
- { 126287 },
+ { 126245 },
/* system_time\000tool\000System/kernel time in nanoseconds\000config=3\000\00000\0... */
- { 127002 },
+ { 126951 },
/* system_tsc_freq\000tool\000The amount a Time Stamp Counter (TSC) increases per s... */
- { 127070 },
+ { 127019 },
/* target_cpu\000tool\0001 if CPUs being analyzed, 0 if threads/processes\000config... */
- { 127169 },
+ { 127118 },
/* user_time\000tool\000User (non-kernel) time in nanoseconds\000config=2\000\00000... */
- { 127887 },
+ { 127727 },
};
static const struct pmu_table_entry pmu_events__common[] = {
{
.entries = pmu_events__common_default_core,
+ .pmu_name = "default_core",
.num_entries = ARRAY_SIZE(pmu_events__common_default_core),
- .pmu_name = { 29669 /* default_core\000 */ },
},
{
.entries = pmu_events__common_software,
+ .pmu_name = "software",
.num_entries = ARRAY_SIZE(pmu_events__common_software),
- .pmu_name = { 126394 /* software\000 */ },
},
{
.entries = pmu_events__common_tool,
+ .pmu_name = "tool",
.num_entries = ARRAY_SIZE(pmu_events__common_tool),
- .pmu_name = { 127341 /* tool\000 */ },
},
};
static const struct compact_pmu_event pmu_metrics__common_default_core[] = {
/* CPUs_utilized\000Default\000(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #targ... */
- { 127980 },
+ { 127820 },
/* backend_cycles_idle\000Default\000(stalled\\-cycles\\-backend / cpu\\-cycles if ... */
- { 128971 },
+ { 128811 },
/* branch_frequency\000Default\000branches / (software@cpu\\-clock\\,name\\=cpu\\-c... */
- { 129145 },
+ { 128985 },
/* branch_miss_rate\000Default\000branch\\-misses / branches\000branch_miss_rate > ... */
- { 129325 },
+ { 129165 },
/* cs_per_second\000Default\000software@context\\-switches\\,name\\=context\\-switc... */
- { 129501 },
+ { 129341 },
/* cycles_frequency\000Default\000cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu... */
- { 129734 },
+ { 129574 },
/* dtlb_miss_rate\000Default3\000dTLB\\-load\\-misses / dTLB\\-loads\000dtlb_miss_r... */
- { 129975 },
+ { 129815 },
/* frontend_cycles_idle\000Default\000(stalled\\-cycles\\-frontend / cpu\\-cycles i... */
- { 130081 },
+ { 129921 },
/* insn_per_cycle\000Default\000instructions / cpu\\-cycles\000insn_per_cycle < 1\0... */
- { 130328 },
+ { 130168 },
/* itlb_miss_rate\000Default3\000iTLB\\-load\\-misses / iTLB\\-loads\000itlb_miss_r... */
- { 130441 },
+ { 130281 },
/* l1_prefetch_miss_rate\000Default4\000L1\\-dcache\\-prefetch\\-misses / L1\\-dcac... */
- { 130547 },
+ { 130387 },
/* l1d_miss_rate\000Default2\000L1\\-dcache\\-load\\-misses / L1\\-dcache\\-loads\0... */
- { 130695 },
+ { 130535 },
/* l1i_miss_rate\000Default3\000L1\\-icache\\-load\\-misses / L1\\-icache\\-loads\0... */
- { 130811 },
+ { 130651 },
/* llc_miss_rate\000Default2\000LLC\\-load\\-misses / LLC\\-loads\000llc_miss_rate ... */
- { 130926 },
+ { 130766 },
/* migrations_per_second\000Default\000software@cpu\\-migrations\\,name\\=cpu\\-mig... */
- { 131027 },
+ { 130867 },
/* page_faults_per_second\000Default\000software@page\\-faults\\,name\\=page\\-faul... */
- { 131287 },
+ { 131127 },
/* stalled_cycles_per_instruction\000Default\000(max(stalled\\-cycles\\-frontend, s... */
- { 131518 },
+ { 131358 },
};
static const struct pmu_table_entry pmu_metrics__common[] = {
{
.entries = pmu_metrics__common_default_core,
+ .pmu_name = "default_core",
.num_entries = ARRAY_SIZE(pmu_metrics__common_default_core),
- .pmu_name = { 29669 /* default_core\000 */ },
},
};
@@ -5253,144 +5231,144 @@ static const struct compact_pmu_event pmu_events__test_soc_cpu_default_core[] =
/* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000... */
{ 154 },
/* dispatch_blocked.any\000other\000Memory cluster signals to block micro-op dispat... */
- { 29682 },
+ { 29669 },
/* eist_trans\000other\000Number of Enhanced Intel SpeedStep(R) Technology (EIST) t... */
- { 36840 },
+ { 36827 },
/* l3_cache_rd\000cache\000L3 cache access, read\000event=0x40\000\00000\000\000\00... */
- { 110314 },
+ { 110272 },
/* segment_reg_loads.any\000other\000Number of segment register loads\000event=6,pe... */
- { 126075 },
+ { 126033 },
};
static const struct compact_pmu_event pmu_events__test_soc_cpu_hisi_sccl_ddrc[] = {
/* uncore_hisi_ddrc.flux_wcmd\000uncore\000DDRC write commands\000event=2\000\00000... */
- { 127512 },
+ { 127444 },
};
static const struct compact_pmu_event pmu_events__test_soc_cpu_hisi_sccl_l3c[] = {
/* uncore_hisi_l3c.rd_hit_cpipe\000uncore\000Total read hits\000event=7\000\00000\0... */
- { 127582 },
+ { 127514 },
};
static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_cbox[] = {
/* event-hyphen\000uncore\000UNC_CBO_HYPHEN\000event=0xe0\000\00000\000\000\000\000... */
- { 37085 },
+ { 37072 },
/* event-two-hyph\000uncore\000UNC_CBO_TWO_HYPH\000event=0xc0\000\00000\000\000\000... */
- { 37139 },
+ { 37126 },
/* unc_cbo_xsnp_response.miss_eviction\000uncore\000A cross-core snoop resulted fro... */
- { 127346 },
+ { 127290 },
};
static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_imc[] = {
/* uncore_imc.cache_hits\000uncore\000Total cache hits\000event=0x34\000\00000\000\... */
- { 127661 },
+ { 127582 },
};
static const struct compact_pmu_event pmu_events__test_soc_cpu_uncore_imc_free_running[] = {
/* uncore_imc_free_running.cache_miss\000uncore\000Total cache misses\000event=0x12... */
- { 127750 },
+ { 127647 },
};
static const struct pmu_table_entry pmu_events__test_soc_cpu[] = {
{
.entries = pmu_events__test_soc_cpu_default_core,
+ .pmu_name = "default_core",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_default_core),
- .pmu_name = { 29669 /* default_core\000 */ },
},
{
.entries = pmu_events__test_soc_cpu_hisi_sccl_ddrc,
+ .pmu_name = "hisi_sccl,ddrc",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_hisi_sccl_ddrc),
- .pmu_name = { 37368 /* hisi_sccl,ddrc\000 */ },
},
{
.entries = pmu_events__test_soc_cpu_hisi_sccl_l3c,
+ .pmu_name = "hisi_sccl,l3c",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_hisi_sccl_l3c),
- .pmu_name = { 37383 /* hisi_sccl,l3c\000 */ },
},
{
.entries = pmu_events__test_soc_cpu_uncore_cbox,
+ .pmu_name = "uncore_cbox",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_cbox),
- .pmu_name = { 127500 /* uncore_cbox\000 */ },
},
{
.entries = pmu_events__test_soc_cpu_uncore_imc,
+ .pmu_name = "uncore_imc",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_imc),
- .pmu_name = { 127650 /* uncore_imc\000 */ },
},
{
.entries = pmu_events__test_soc_cpu_uncore_imc_free_running,
+ .pmu_name = "uncore_imc_free_running",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_cpu_uncore_imc_free_running),
- .pmu_name = { 127726 /* uncore_imc_free_running\000 */ },
},
};
static const struct compact_pmu_event pmu_metrics__test_soc_cpu_default_core[] = {
/* CPI\000\0001 / IPC\000\000\000\000\000\000\000\000000 */
- { 127957 },
+ { 127797 },
/* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000... */
- { 128166 },
+ { 128006 },
/* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqs... */
- { 128231 },
+ { 128071 },
/* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data... */
- { 128326 },
+ { 128166 },
/* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000... */
- { 128461 },
+ { 128301 },
/* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\0... */
- { 128530 },
+ { 128370 },
/* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.t... */
- { 128601 },
+ { 128441 },
/* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\... */
- { 128768 },
+ { 128608 },
/* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\... */
- { 128832 },
+ { 128672 },
/* M1\000\000ipc + M2\000\000\000\000\000\000\000\000000 */
- { 128904 },
+ { 128744 },
/* M2\000\000ipc + M1\000\000\000\000\000\000\000\000000 */
- { 128927 },
+ { 128767 },
/* M3\000\0001 / M3\000\000\000\000\000\000\000\000000 */
- { 128950 },
+ { 128790 },
/* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\... */
- { 129429 },
+ { 129269 },
/* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\0... */
- { 129910 },
+ { 129750 },
/* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\00... */
- { 130260 },
+ { 130100 },
};
static const struct pmu_table_entry pmu_metrics__test_soc_cpu[] = {
{
.entries = pmu_metrics__test_soc_cpu_default_core,
+ .pmu_name = "default_core",
.num_entries = ARRAY_SIZE(pmu_metrics__test_soc_cpu_default_core),
- .pmu_name = { 29669 /* default_core\000 */ },
},
};
static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_ccn_pmu[] = {
/* sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x0... */
- { 126706 },
+ { 126655 },
};
static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_cmn_pmu[] = {
/* sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first looku... */
- { 126783 },
+ { 126732 },
};
static const struct compact_pmu_event pmu_events__test_soc_sys_uncore_sys_ddr_pmu[] = {
/* sys_ddr_pmu.write_cycles\000uncore\000ddr write-cycles event\000event=0x2b\000v8... */
- { 126926 },
+ { 126875 },
};
static const struct pmu_table_entry pmu_events__test_soc_sys[] = {
{
.entries = pmu_events__test_soc_sys_uncore_sys_ccn_pmu,
+ .pmu_name = "uncore_sys_ccn_pmu",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_ccn_pmu),
- .pmu_name = { 127830 /* uncore_sys_ccn_pmu\000 */ },
},
{
.entries = pmu_events__test_soc_sys_uncore_sys_cmn_pmu,
+ .pmu_name = "uncore_sys_cmn_pmu",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_cmn_pmu),
- .pmu_name = { 127849 /* uncore_sys_cmn_pmu\000 */ },
},
{
.entries = pmu_events__test_soc_sys_uncore_sys_ddr_pmu,
+ .pmu_name = "uncore_sys_ddr_pmu",
.num_entries = ARRAY_SIZE(pmu_events__test_soc_sys_uncore_sys_ddr_pmu),
- .pmu_name = { 127868 /* uncore_sys_ddr_pmu\000 */ },
},
};
@@ -5549,7 +5527,7 @@ static int pmu_events_table__for_each_event_pmu(const struct pmu_events_table *t
{
int ret;
struct pmu_event pe = {
- .pmu = &big_c_string[pmu->pmu_name.offset],
+ .pmu = pmu->pmu_name,
};
for (uint32_t i = 0; i < pmu->num_entries; i++) {
@@ -5570,7 +5548,7 @@ static int pmu_events_table__find_event_pmu(const struct pmu_events_table *table
void *data)
{
struct pmu_event pe = {
- .pmu = &big_c_string[pmu->pmu_name.offset],
+ .pmu = pmu->pmu_name,
};
int low = 0, high = pmu->num_entries - 1;
@@ -5615,10 +5593,9 @@ int pmu_events_table__for_each_event(const struct pmu_events_table *table,
return 0;
for (size_t i = 0; i < table->num_pmus; i++) {
const struct pmu_table_entry *table_pmu = &table->pmus[i];
- const char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
int ret;
- if (pmu && !perf_pmu__name_wildcard_match(pmu, pmu_name))
+ if (pmu && !perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
continue;
ret = pmu_events_table__for_each_event_pmu(table, table_pmu, fn, data);
@@ -5638,10 +5615,9 @@ int pmu_events_table__find_event(const struct pmu_events_table *table,
return PMU_EVENTS__NOT_FOUND;
for (size_t i = 0; i < table->num_pmus; i++) {
const struct pmu_table_entry *table_pmu = &table->pmus[i];
- const char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
int ret;
- if (pmu && !perf_pmu__name_wildcard_match(pmu, pmu_name))
+ if (pmu && !perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
continue;
ret = pmu_events_table__find_event_pmu(table, table_pmu, name, fn, data);
@@ -5659,9 +5635,8 @@ size_t pmu_events_table__num_events(const struct pmu_events_table *table, struct
return 0;
for (size_t i = 0; i < table->num_pmus; i++) {
const struct pmu_table_entry *table_pmu = &table->pmus[i];
- const char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
- if (perf_pmu__name_wildcard_match(pmu, pmu_name))
+ if (perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
count += table_pmu->num_entries;
}
return count;
@@ -5674,7 +5649,7 @@ static int pmu_metrics_table__for_each_metric_pmu(const struct pmu_metrics_table
{
int ret;
struct pmu_metric pm = {
- .pmu = &big_c_string[pmu->pmu_name.offset],
+ .pmu = pmu->pmu_name,
};
for (uint32_t i = 0; i < pmu->num_entries; i++) {
@@ -5695,7 +5670,7 @@ static int pmu_metrics_table__find_metric_pmu(const struct pmu_metrics_table *ta
void *data)
{
struct pmu_metric pm = {
- .pmu = &big_c_string[pmu->pmu_name.offset],
+ .pmu = pmu->pmu_name,
};
int low = 0, high = pmu->num_entries - 1;
@@ -5756,10 +5731,9 @@ int pmu_metrics_table__find_metric(const struct pmu_metrics_table *table,
return 0;
for (size_t i = 0; i < table->num_pmus; i++) {
const struct pmu_table_entry *table_pmu = &table->pmus[i];
- const char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
int ret;
- if (pmu && !perf_pmu__name_wildcard_match(pmu, pmu_name))
+ if (pmu && !perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
continue;
ret = pmu_metrics_table__find_metric_pmu(table, table_pmu, metric, fn, data);
@@ -5830,9 +5804,7 @@ static const struct pmu_events_map *map_for_pmu(struct perf_pmu *pmu)
if (pmu) {
for (size_t i = 0; i < ARRAY_SIZE(pmu_events__common); i++) {
- const char *pmu_name = &big_c_string[pmu_events__common[i].pmu_name.offset];
-
- if (!strcmp(pmu_name, pmu->name)) {
+ if (!strcmp(pmu_events__common[i].pmu_name, pmu->name)) {
const struct pmu_events_map *map = &pmu_events_map[0];
while (strcmp("common", map->arch))
@@ -5857,9 +5829,8 @@ const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu)
for (size_t i = 0; i < map->event_table.num_pmus; i++) {
const struct pmu_table_entry *table_pmu = &map->event_table.pmus[i];
- const char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
- if (perf_pmu__name_wildcard_match(pmu, pmu_name))
+ if (perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
return &map->event_table;
}
return NULL;
diff --git a/tools/perf/pmu-events/jevents.py b/tools/perf/pmu-events/jevents.py
index fae191272859..5d5f8fd79e11 100755
--- a/tools/perf/pmu-events/jevents.py
+++ b/tools/perf/pmu-events/jevents.py
@@ -544,12 +544,11 @@ def print_pending_events() -> None:
static const struct pmu_table_entry {_pending_events_tblname}[] = {{
""")
for (pmu, tbl_pmu) in sorted(pmus):
- pmu_name = (pmu + '\0').encode('utf-8')
- pmu_comment = bytes_to_c_literal(pmu_name).replace('*/', r'\*\/')
+ pmu_lit = bytes_to_c_literal(pmu.encode('utf-8'))
_args.output_file.write(f"""\t{{
\t\t.entries = {_pending_events_tblname}_{tbl_pmu},
+\t\t.pmu_name = "{pmu_lit}",
\t\t.num_entries = ARRAY_SIZE({_pending_events_tblname}_{tbl_pmu}),
-\t\t.pmu_name = {{ {_bcs.offsets[pmu_name]} /* {pmu_comment} */ }},
\t}},
""")
_args.output_file.write('};\n\n')
@@ -601,12 +600,11 @@ def print_pending_metrics() -> None:
static const struct pmu_table_entry {_pending_metrics_tblname}[] = {{
""")
for (pmu, tbl_pmu) in sorted(pmus):
- pmu_name = (pmu + '\0').encode('utf-8')
- pmu_comment = bytes_to_c_literal(pmu_name).replace('*/', r'\*\/')
+ pmu_lit = bytes_to_c_literal(pmu.encode('utf-8'))
_args.output_file.write(f"""\t{{
\t\t.entries = {_pending_metrics_tblname}_{tbl_pmu},
+\t\t.pmu_name = "{pmu_lit}",
\t\t.num_entries = ARRAY_SIZE({_pending_metrics_tblname}_{tbl_pmu}),
-\t\t.pmu_name = {{ {_bcs.offsets[pmu_name]} /* {pmu_comment} */ }},
\t}},
""")
_args.output_file.write('};\n\n')
@@ -645,12 +643,9 @@ def preprocess_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
topic = get_topic(item.name)
for event in read_json_events(item.path, topic):
- pmu_name = (event.pmu + '\0').encode('utf-8')
if event.name:
- _bcs.add(pmu_name, is_metric=False)
_bcs.add(event.build_bytes(is_metric=False), is_metric=False)
if event.metric_name:
- _bcs.add(pmu_name, is_metric=True)
_bcs.add(event.build_bytes(is_metric=True), is_metric=True)
def process_one_file(parents: Sequence[str], item: os.DirEntry) -> None:
@@ -947,7 +942,7 @@ static int pmu_events_table__for_each_event_pmu(const struct pmu_events_table *t
{
\tint ret;
\tstruct pmu_event pe = {
-\t\t.pmu = &big_c_string[pmu->pmu_name.offset],
+\t\t.pmu = pmu->pmu_name,
\t};
\tfor (uint32_t i = 0; i < pmu->num_entries; i++) {
@@ -968,7 +963,7 @@ static int pmu_events_table__find_event_pmu(const struct pmu_events_table *table
\t\t\t\t\t void *data)
{
\tstruct pmu_event pe = {
-\t\t.pmu = &big_c_string[pmu->pmu_name.offset],
+\t\t.pmu = pmu->pmu_name,
\t};
\tint low = 0, high = pmu->num_entries - 1;
@@ -1013,10 +1008,9 @@ int pmu_events_table__for_each_event(const struct pmu_events_table *table,
\t\treturn 0;
\tfor (size_t i = 0; i < table->num_pmus; i++) {
\t\tconst struct pmu_table_entry *table_pmu = &table->pmus[i];
-\t\tconst char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
\t\tint ret;
-\t\tif (pmu && !perf_pmu__name_wildcard_match(pmu, pmu_name))
+\t\tif (pmu && !perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
\t\t\tcontinue;
\t\tret = pmu_events_table__for_each_event_pmu(table, table_pmu, fn, data);
@@ -1036,10 +1030,9 @@ int pmu_events_table__find_event(const struct pmu_events_table *table,
\t\treturn PMU_EVENTS__NOT_FOUND;
\tfor (size_t i = 0; i < table->num_pmus; i++) {
\t\tconst struct pmu_table_entry *table_pmu = &table->pmus[i];
-\t\tconst char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
\t\tint ret;
-\t\tif (pmu && !perf_pmu__name_wildcard_match(pmu, pmu_name))
+\t\tif (pmu && !perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
\t\t\tcontinue;
\t\tret = pmu_events_table__find_event_pmu(table, table_pmu, name, fn, data);
@@ -1057,9 +1050,8 @@ size_t pmu_events_table__num_events(const struct pmu_events_table *table, struct
\t\treturn 0;
\tfor (size_t i = 0; i < table->num_pmus; i++) {
\t\tconst struct pmu_table_entry *table_pmu = &table->pmus[i];
-\t\tconst char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
-\t\tif (perf_pmu__name_wildcard_match(pmu, pmu_name))
+\t\tif (perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
\t\t\tcount += table_pmu->num_entries;
\t}
\treturn count;
@@ -1072,7 +1064,7 @@ static int pmu_metrics_table__for_each_metric_pmu(const struct pmu_metrics_table
{
\tint ret;
\tstruct pmu_metric pm = {
-\t\t.pmu = &big_c_string[pmu->pmu_name.offset],
+\t\t.pmu = pmu->pmu_name,
\t};
\tfor (uint32_t i = 0; i < pmu->num_entries; i++) {
@@ -1093,7 +1085,7 @@ static int pmu_metrics_table__find_metric_pmu(const struct pmu_metrics_table *ta
\t\t\t\t\t void *data)
{
\tstruct pmu_metric pm = {
-\t\t.pmu = &big_c_string[pmu->pmu_name.offset],
+\t\t.pmu = pmu->pmu_name,
\t};
\tint low = 0, high = pmu->num_entries - 1;
@@ -1154,10 +1146,9 @@ int pmu_metrics_table__find_metric(const struct pmu_metrics_table *table,
\t\treturn 0;
\tfor (size_t i = 0; i < table->num_pmus; i++) {
\t\tconst struct pmu_table_entry *table_pmu = &table->pmus[i];
-\t\tconst char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
\t\tint ret;
-\t\tif (pmu && !perf_pmu__name_wildcard_match(pmu, pmu_name))
+\t\tif (pmu && !perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
\t\t\tcontinue;
\t\tret = pmu_metrics_table__find_metric_pmu(table, table_pmu, metric, fn, data);
@@ -1228,9 +1219,7 @@ static const struct pmu_events_map *map_for_pmu(struct perf_pmu *pmu)
\tif (pmu) {
\t\tfor (size_t i = 0; i < ARRAY_SIZE(pmu_events__common); i++) {
-\t\t\tconst char *pmu_name = &big_c_string[pmu_events__common[i].pmu_name.offset];
-
-\t\t\tif (!strcmp(pmu_name, pmu->name)) {
+\t\t\tif (!strcmp(pmu_events__common[i].pmu_name, pmu->name)) {
\t\t\t\tconst struct pmu_events_map *map = &pmu_events_map[0];
\t\t\t\twhile (strcmp("common", map->arch))
@@ -1255,9 +1244,8 @@ const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu)
\tfor (size_t i = 0; i < map->event_table.num_pmus; i++) {
\t\tconst struct pmu_table_entry *table_pmu = &map->event_table.pmus[i];
-\t\tconst char *pmu_name = &big_c_string[table_pmu->pmu_name.offset];
-\t\tif (perf_pmu__name_wildcard_match(pmu, pmu_name))
+\t\tif (perf_pmu__name_wildcard_match(pmu, table_pmu->pmu_name))
\t\t\treturn &map->event_table;
\t}
\treturn NULL;
@@ -1503,8 +1491,8 @@ struct compact_pmu_event {
struct pmu_table_entry {
\tconst struct compact_pmu_event *entries;
+\tconst char *pmu_name;
\tuint32_t num_entries;
-\tstruct compact_pmu_event pmu_name;
};
""")
--
2.56.1.703.gf848ed807c-goog
next prev parent reply other threads:[~2026-11-13 21:08 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-13 21:08 [PATCH 00/10] perf jevents: Block-indexed string compression and default JEVENTS_ARCH=all Ian Rogers
2026-11-13 21:08 ` [PATCH 01/10] perf jevents: Store raw bytes in BigCString instead of C-escaped strings Ian Rogers
2026-11-13 21:08 ` [PATCH 02/10] perf jevents: Sort BigCString entries alphabetically Ian Rogers
2026-11-13 21:08 ` Ian Rogers [this message]
2026-11-13 21:08 ` [PATCH 04/10] perf jevents: Encapsulate big_c_string lookups behind pmu_events__get_string() Ian Rogers
2026-11-13 21:08 ` [PATCH 05/10] perf jevents: Add block-indexed string packing and --compress=zlib Ian Rogers
2026-11-13 21:08 ` [PATCH 06/10] perf jevents: Add --compress=lzma block compression backend Ian Rogers
2026-11-13 21:08 ` [PATCH 07/10] perf jevents: Add --compress=zstd " Ian Rogers
2026-11-13 21:08 ` [PATCH 08/10] perf build: Enable jevents string compression when available Ian Rogers
2026-11-13 21:08 ` [PATCH 09/10] perf tests pmu-events: Test metricgroup descriptions and concurrent lookups Ian Rogers
2026-11-13 21:08 ` [PATCH 10/10] perf build: Default JEVENTS_ARCH to all Ian Rogers
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