[PATCH 2/5] dt-bindings: mtd: Add lantiq,nor

[Simon Wunderlich <sw@simonwunderlich.de>]

The NOR flash on the External Bus Unit (EBU) of Lantiq SoCs is handled
by the lantiq-flash driver and used by danube_easy50712.dts, but its
binding was never documented.

Add a schema for it, including a new optional lantiq,ebu-swap-check
property. Some boot loaders, like the BOSS bootmonitor on the bintec
elmeg RS123 and RS353, enable the EBU's own endianness swapping for the
flash chip select (EBU_BUSCON0 bit 30), and the flash then appears at
its unswapped addresses. Whether that bit can be trusted depends on the
SoC: it only works on VR9 (xRX200) from revision 1.2 and on AR10
(xRX300), and Falcon has no such register. A board property instead of
a list of SoC revisions in the driver was requested in the review of an
earlier attempt at this. The property does not state the bit's value,
so a board keeps working with either boot loader setting.

Link: https://lists.infradead.org/pipermail/linux-mtd/2017-January/071749.html
Link: https://lists.infradead.org/pipermail/linux-mtd/2017-January/071818.html
Signed-off-by: Simon Wunderlich <sw@simonwunderlich.de>
---
 .../devicetree/bindings/mtd/lantiq,nor.yaml   | 79 +++++++++++++++++++
 1 file changed, 79 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/lantiq,nor.yaml

diff --git a/Documentation/devicetree/bindings/mtd/lantiq,nor.yaml b/Documentation/devicetree/bindings/mtd/lantiq,nor.yaml
new file mode 100644
index 000000000000..e6f2be1245dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/lantiq,nor.yaml
@@ -0,0 +1,79 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/lantiq,nor.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq SoC NOR flash on the External Bus Unit
+
+maintainers:
+  - Simon Wunderlich <sw@simonwunderlich.de>
+
+description:
+  Parallel CFI NOR flash on chip select 0 of the External Bus Unit (EBU) of
+  Lantiq SoCs. Depending on how the EBU is configured, the address lines of
+  the flash are swapped, so the chip is not accessible as a plain
+  memory-mapped CFI flash.
+
+allOf:
+  - $ref: mtd.yaml#
+
+properties:
+  compatible:
+    const: lantiq,nor
+
+  reg:
+    maxItems: 1
+
+  bank-width:
+    description: Width (in bytes) of the flash bank.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    const: 2
+
+  lantiq,ebu-swap-check:
+    type: boolean
+    description:
+      The EBU's own endianness swapping for chip select 0 (EBU_BUSCON0 bit
+      30) is usable on this board and may have been enabled by the boot
+      loader. When it is enabled, the flash appears at its unswapped
+      addresses. The bit only works on VR9 (xRX200) from revision 1.2 and on
+      AR10 (xRX300), so this property must only be set on boards with one of
+      these SoCs.
+
+required:
+  - compatible
+  - reg
+  - bank-width
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    bus {
+        #address-cells = <2>;
+        #size-cells = <1>;
+
+        flash@0 {
+            compatible = "lantiq,nor";
+            reg = <0 0x0 0x2000000>;
+            bank-width = <2>;
+            lantiq,ebu-swap-check;
+
+            partitions {
+                compatible = "fixed-partitions";
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                partition@0 {
+                    reg = <0x0 0x40000>;
+                    label = "boot";
+                    read-only;
+                };
+
+                partition@40000 {
+                    reg = <0x40000 0x1fc0000>;
+                    label = "firmware";
+                };
+            };
+        };
+    };
-- 
2.47.3