From: Majid Hajiheidari <majidhhdri@gmail.com>
To: andersson@kernel.org, konradybcio@kernel.org
Cc: rafael@kernel.org, viresh.kumar@linaro.org, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, abelvesa@kernel.org,
mani@kernel.org, admin@mswin.me, linux-arm-msm@vger.kernel.org,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: qcom: sm6125: Add CPU idle states
Date: Sun, 15 Nov 2026 01:31:58 +0100 [thread overview]
Message-ID: <20261115003158.391171-4-majidhhdri@gmail.com> (raw)
In-Reply-To: <20261115003158.391171-1-majidhhdri@gmail.com>
Add per-CPU power collapse states. The downstream "trinket" low power
levels use exactly the SM6115 numbers (silver: entry 290 us, exit
376 us, min residency 1182 us; gold: 297/324/1110 us; PSCI CPU mode 3),
so reuse them in platform-coordinated mode.
Cluster (domain) idle states are left for later; their PSCI parameters
still need to be checked against the downstream levels.
Tested on a Xiaomi Mi A3: WFI and cpu-sleep-N-0 show up in cpuidle and
the usage counters increase.
Signed-off-by: Majid Hajiheidari <majidhhdri@gmail.com>
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 32 ++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 1b148e453..c06842c0c 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -44,6 +44,7 @@ cpu0: cpu@0 {
reg = <0x0 0x0>;
enable-method = "psci";
clocks = <&cpufreq_hw 0>;
+ cpu-idle-states = <&little_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2_0>;
@@ -60,6 +61,7 @@ cpu1: cpu@1 {
reg = <0x0 0x1>;
enable-method = "psci";
clocks = <&cpufreq_hw 0>;
+ cpu-idle-states = <&little_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2_0>;
@@ -71,6 +73,7 @@ cpu2: cpu@2 {
reg = <0x0 0x2>;
enable-method = "psci";
clocks = <&cpufreq_hw 0>;
+ cpu-idle-states = <&little_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2_0>;
@@ -82,6 +85,7 @@ cpu3: cpu@3 {
reg = <0x0 0x3>;
enable-method = "psci";
clocks = <&cpufreq_hw 0>;
+ cpu-idle-states = <&little_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2_0>;
@@ -93,6 +97,7 @@ cpu4: cpu@100 {
reg = <0x0 0x100>;
enable-method = "psci";
clocks = <&cpufreq_hw 1>;
+ cpu-idle-states = <&big_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1638>;
next-level-cache = <&l2_1>;
@@ -109,6 +114,7 @@ cpu5: cpu@101 {
reg = <0x0 0x101>;
enable-method = "psci";
clocks = <&cpufreq_hw 1>;
+ cpu-idle-states = <&big_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1638>;
next-level-cache = <&l2_1>;
@@ -120,6 +126,7 @@ cpu6: cpu@102 {
reg = <0x0 0x102>;
enable-method = "psci";
clocks = <&cpufreq_hw 1>;
+ cpu-idle-states = <&big_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1638>;
next-level-cache = <&l2_1>;
@@ -131,6 +138,7 @@ cpu7: cpu@103 {
reg = <0x0 0x103>;
enable-method = "psci";
clocks = <&cpufreq_hw 1>;
+ cpu-idle-states = <&big_cpu_sleep_0>;
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1638>;
next-level-cache = <&l2_1>;
@@ -173,6 +181,30 @@ core3 {
};
};
};
+
+ idle-states {
+ entry-method = "psci";
+
+ little_cpu_sleep_0: cpu-sleep-0-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "silver-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <290>;
+ exit-latency-us = <376>;
+ min-residency-us = <1182>;
+ local-timer-stop;
+ };
+
+ big_cpu_sleep_0: cpu-sleep-1-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "gold-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <297>;
+ exit-latency-us = <324>;
+ min-residency-us = <1110>;
+ local-timer-stop;
+ };
+ };
};
firmware {
--
2.56.1
prev parent reply other threads:[~2026-11-15 0:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-15 0:31 [PATCH 0/3] arm64: dts: qcom: sm6125: Add cpufreq-hw and " Majid Hajiheidari
2026-11-15 0:31 ` [PATCH 1/3] dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6125 compatible Majid Hajiheidari
2026-11-15 0:31 ` [PATCH 2/3] arm64: dts: qcom: sm6125: Add cpufreq-hw node Majid Hajiheidari
2026-11-15 0:31 ` Majid Hajiheidari [this message]
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