[PATCH 0/3] arm64: dts: qcom: sm6125: Add cpufreq-hw and CPU idle states

[Majid Hajiheidari <majidhhdri@gmail.com>]

SM6125 has no CPU frequency scaling and no CPU idle states in mainline:
the CPUs stay at the bootloader clock and only ever enter WFI.

The blocks are the same as on SM6115. Register addresses and idle
latencies come from the downstream "trinket" device tree of a Xiaomi
Mi A3 (laurel-sprout), where the CPU low power levels match the SM6115
values exactly.

Tested on the Mi A3 on next-20261113: cpufreq 300 MHz - 1.80/2.02 GHz
with schedutil, WFI plus per-CPU power collapse in cpuidle with rising
usage counters.

This is meant to go together with Roman Linev's SM6125 TSENS series [1],
which adds #cooling-cells to the CPUs and per-CPU cooling maps that stay
inert until a cpufreq driver registers cooling devices. That is why
#cooling-cells is not added here. On my phone the same TSENS
description (derived independently) runs together with this series and
the cpufreq cooling devices bind.

Not done yet: cluster idle states (PSCI OSI parameters need checking) and
an energy model.

[1] https://lore.kernel.org/r/a3f071d3-6082-47a1-bb00-9d8e72fa3cdd@mswin.me/

Majid Hajiheidari (3):
  dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM6125 compatible
  arm64: dts: qcom: sm6125: Add cpufreq-hw node
  arm64: dts: qcom: sm6125: Add CPU idle states

 .../bindings/cpufreq/cpufreq-qcom-hw.yaml     |  2 +
 arch/arm64/boot/dts/qcom/sm6125.dtsi          | 61 +++++++++++++++++++
 2 files changed, 63 insertions(+)


base-commit: 84abb955b1015477aa11a96e2f3ac1b938b77f48
-- 
2.56.1