From: Sudeep Holla <sudeep.holla@arm.com>
To: Jeremy Linton <jeremy.linton@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
hanjun.guo@linaro.org, rjw@rjwysocki.net, will.deacon@arm.com,
catalin.marinas@arm.com, gregkh@linuxfoundation.org,
viresh.kumar@linaro.org, mark.rutland@arm.com,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
jhugo@codeaurora.org, wangxiongfeng2@huawei.com,
Jonathan.Zhang@cavium.com, ahs3@redhat.com,
Jayachandran.Nair@cavium.com, austinwc@codeaurora.org
Subject: Re: [PATCH v3 6/7] arm64: topology: Enable ACPI/PPTT based CPU topology.
Date: Fri, 20 Oct 2017 17:42:51 +0100 [thread overview]
Message-ID: <2114f173-4d89-278b-71f9-3b80457cfa63@arm.com> (raw)
In-Reply-To: <e2772689-603b-f129-0643-f5d1f5e41a19@arm.com>
On 20/10/17 17:14, Jeremy Linton wrote:
> Hi,
>
> On 10/20/2017 04:14 AM, Lorenzo Pieralisi wrote:
>> On Thu, Oct 19, 2017 at 11:13:27AM -0500, Jeremy Linton wrote:
>>> On 10/19/2017 10:56 AM, Lorenzo Pieralisi wrote:
>>>> On Thu, Oct 12, 2017 at 02:48:55PM -0500, Jeremy Linton wrote:
>>>>> Propagate the topology information from the PPTT tree to the
>>>>> cpu_topology array. We can get the thread id, core_id and
>>>>> cluster_id by assuming certain levels of the PPTT tree correspond
>>>>> to those concepts. The package_id is flagged in the tree and can be
>>>>> found by passing an arbitrary large level to setup_acpi_cpu_topology()
>>>>> which terminates its search when it finds an ACPI node flagged
>>>>> as the physical package. If the tree doesn't contain enough
>>>>> levels to represent all of thread/core/cod/package then the package
>>>>> id will be used for the missing levels.
>>>>>
>>>>> Since server/ACPI machines are more likely to be multisocket and NUMA,
>>>>
>>>> I think this stuff is vague enough already so to start with I would
>>>> drop
>>>> patch 4 and 5 and stop assuming what machines are more likely to ship
>>>> with ACPI than DT.
>>>>
>>>> I am just saying, for the umpteenth time, that these levels have no
>>>> architectural meaning _whatsoever_, level is a hierarchy concept
>>>> with no architectural meaning attached.
>>>
>>> ?
>>>
>>> Did anyone say anything about that? No, I think the only thing being
>>> guaranteed here is that the kernel's physical_id maps to an ACPI
>>> defined socket. Which seems to be the mindset of pretty much the
>>> entire !arm64 community meaning they are optimizing their software
>>> and the kernel with that concept in mind.
>>>
>>> Are you denying the existence of non-uniformity between threads
>>> running on different physical sockets?
>>
>> No, I have not explained my POV clearly, apologies.
>>
>> AFAIK, the kernel currently deals with 2 (3 - if SMT) topology layers.
>>
>> 1) thread
>> 2) core
>> 3) package
>>
>> What I wanted to say is, that, to simplify this series, you do not need
>> to introduce the COD topology level, since it is just another arbitrary
>> topology level (ie there is no way you can pinpoint which level
>> corresponds to COD with PPTT - or DT for the sake of this discussion)
>> that would not be used in the kernel (apart from big.LITTLE cpufreq
>> driver and PSCI checker whose usage of topology_physical_package_id() is
>> questionable anyway).
Just thinking out loud here.
1. psci_checker.c : it's just used to get groups of cpu's to achieve
deeper idle states. It should be easy to get rid of that.
2. big.LITTLE cpufreq : 2 users, scpi I should be able to do what I did
for SCMI and for spc I am thinking if we can hard code it's just used
on TC2
--
Regards,
Sudeep
next prev parent reply other threads:[~2017-10-20 16:43 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 19:48 [PATCH v3 0/7] Support PPTT for ARM64 Jeremy Linton
2017-10-12 19:48 ` [PATCH v3 1/7] ACPI/PPTT: Add Processor Properties Topology Table parsing Jeremy Linton
2017-10-13 9:56 ` Julien Thierry
2017-10-13 22:41 ` Jeremy Linton
2017-10-13 14:23 ` tn
2017-10-13 19:58 ` Jeremy Linton
2017-10-16 14:24 ` John Garry
2017-10-17 13:25 ` Tomasz Nowicki
2017-10-17 15:22 ` Jeremy Linton
2017-10-18 1:10 ` Xiongfeng Wang
2017-10-18 5:39 ` Tomasz Nowicki
2017-10-18 10:24 ` Tomasz Nowicki
2017-10-18 17:30 ` Jeremy Linton
2017-10-19 5:18 ` Tomasz Nowicki
2017-10-19 10:25 ` John Garry
2017-10-27 5:21 ` Tomasz Nowicki
2017-10-19 14:24 ` Jeremy Linton
2017-10-19 10:22 ` Lorenzo Pieralisi
2017-10-19 15:43 ` Jeremy Linton
2017-10-20 10:15 ` Lorenzo Pieralisi
2017-10-20 19:53 ` Christ, Austin
2017-10-23 21:14 ` Jeremy Linton
2017-10-12 19:48 ` [PATCH v3 2/7] ACPI: Enable PPTT support on ARM64 Jeremy Linton
2017-10-13 9:53 ` Hanjun Guo
2017-10-13 17:51 ` Jeremy Linton
2017-10-18 16:47 ` Lorenzo Pieralisi
2017-10-18 17:38 ` Jeremy Linton
2017-10-19 9:12 ` Lorenzo Pieralisi
2017-10-12 19:48 ` [PATCH v3 3/7] drivers: base: cacheinfo: arm64: Add support for ACPI based firmware tables Jeremy Linton
2017-10-19 15:20 ` Lorenzo Pieralisi
2017-10-19 15:52 ` Jeremy Linton
2017-10-12 19:48 ` [PATCH v3 4/7] Topology: Add cluster on die macros and arm64 decoding Jeremy Linton
2017-10-12 19:48 ` [PATCH v3 5/7] arm64: Fixup users of topology_physical_package_id Jeremy Linton
2017-10-12 19:48 ` [PATCH v3 6/7] arm64: topology: Enable ACPI/PPTT based CPU topology Jeremy Linton
2017-10-19 15:56 ` Lorenzo Pieralisi
2017-10-19 16:13 ` Jeremy Linton
2017-10-20 9:14 ` Lorenzo Pieralisi
2017-10-20 16:14 ` Jeremy Linton
2017-10-20 16:42 ` Sudeep Holla [this message]
2017-10-20 19:55 ` Jeffrey Hugo
2017-10-23 21:26 ` Jeremy Linton
2017-10-19 16:54 ` Jeremy Linton
2017-10-20 9:22 ` Lorenzo Pieralisi
2017-11-01 20:29 ` Al Stone
2017-11-02 10:48 ` Lorenzo Pieralisi
2017-10-12 19:48 ` [PATCH v3 7/7] ACPI: Add PPTT to injectable table list Jeremy Linton
2017-10-13 11:08 ` [PATCH v3 0/7] Support PPTT for ARM64 John Garry
2017-10-13 19:34 ` Jeremy Linton
2017-10-31 12:46 ` Jon Masters
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