From: "Heiko Stübner" <heiko@sntech.de>
To: Elaine Zhang <zhangqing@rock-chips.com>, Cunhao Lu <1579567540@qq.com>
Cc: linux-clk <linux-clk@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-rockchip <linux-rockchip@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
mfd <mfd@lists.linux.dev>,
linux-gpio <linux-gpio@vger.kernel.org>,
netdev <netdev@vger.kernel.org>,
linux-pm <linux-pm@vger.kernel.org>,
linux-i2c <linux-i2c@vger.kernel.org>,
linux-serial <linux-serial@vger.kernel.org>,
linux-mmc <linux-mmc@vger.kernel.org>,
linux-stm32 <linux-stm32@st-md-mailman.stormreply.com>,
linux-phy <linux-phy@lists.infradead.org>,
linux-usb <linux-usb@vger.kernel.org>
Subject: Re: [PATCH 07/27] clk: rockchip: Add RK3572 clock and reset support
Date: Thu, 22 Oct 2026 09:38:06 +0200 [thread overview]
Message-ID: <2117228.PIDvDuAF1L@diego> (raw)
In-Reply-To: <tencent_791C8CE4050020CEF9E536C9D3B4CA9C250A@qq.com>
Hi,
Am Donnerstag, 22. Oktober 2026, 08:09:02 Mitteleuropäische Sommerzeit schrieb Cunhao Lu:
> Hi Heiko,
>
> > As you didn't write this driver on your own and even kept the original
> > author, please also credit the original author in the commit itself.
> >
> > This can be done for example with something like
> > git commit --amend --author="Elaine Zhang <zhangqing@rock-chips.com>"
> > and in the commit also have both signed-offs-by, aka Elaine first
> > then yours below as the submitter, i.e. like
> >
> > +++++++++++
> > Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> > [document what changes you did inside the brackets]
> > Signed-off-by: Cunhao Lu <1579567540@qq.com>
> > +++++++++++
> >
> > The same applies to all commits coming from the Rockchip vendor kernel.
>
> Thanks for pointing this out, and sorry for missing the commit authorship.
>
> I'll review all patches and add the original authors' names where necessary.
> However, because the BSP I received does not include Git commit history, I can
> only identify them from the names noted in the file headers.
Rockchip has published a development branch based on 6.12 on github [0] .
This includes this clock driver [1] and most likely all the other parts as well.
You can use this to cross-reference.
If there are multiple authors changing the rk3572-specific parts of a file,
please use the first patch author from that history for your patch, as we
don't want to replicate the development history from that vendor kernel
tree.
Thanks
Heiko
[0] https://github.com/rockchip-linux/kernel/tree/develop-6.12
[1] https://github.com/rockchip-linux/kernel/blob/develop-6.12/drivers/clk/rockchip/clk-rk3572.c
next prev parent reply other threads:[~2026-10-22 7:38 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 16:10 [PATCH 00/27] rockchip: Add RK3572 and Forlinx OK3572-C support Cunhao Lu via B4 Relay
2026-10-21 16:10 ` [PATCH 01/27] dt-bindings: clock: rockchip: Add RK3572 CRU Cunhao Lu via B4 Relay
2026-10-21 16:10 ` [PATCH 02/27] dt-bindings: power: rockchip: Add RK3572 power domains Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 03/27] dt-bindings: soc: rockchip: Add RK3572 PMU and GRF Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 04/27] dt-bindings: mfd: syscon: Add RK3572 QoS register compatible Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 05/27] dt-bindings: pinctrl: rockchip: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 06/27] dt-bindings: gpio: rockchip: Add RK3572 GPIO banks Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 07/27] clk: rockchip: Add RK3572 clock and reset support Cunhao Lu via B4 Relay
2026-10-21 22:26 ` Heiko Stübner
2026-10-22 6:09 ` Cunhao Lu
2026-10-22 7:38 ` Heiko Stübner [this message]
2026-10-22 8:31 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 08/27] pinctrl: rockchip: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 09/27] gpio: rockchip: Add RK3572 GPIO support Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 10/27] pmdomain: rockchip: Add RK3572 boot peripheral domains Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 11/27] dt-bindings: i2c: rk3x: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 12/27] dt-bindings: serial: snps-dw-apb-uart: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 13/27] dt-bindings: mmc: rockchip: Add RK3572 controllers Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 14/27] dt-bindings: net: rockchip-dwmac: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 17:14 ` Andrew Lunn
2026-10-22 6:03 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 15/27] dt-bindings: thermal: rockchip: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 16/27] net: stmmac: dwmac-rk: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 17:09 ` Andrew Lunn
2026-10-22 5:33 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 17/27] thermal: rockchip: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 18/27] dt-bindings: phy: rockchip-inno-usb2: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 19/27] dt-bindings: phy: rockchip-naneng-combphy: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 20/27] dt-bindings: usb: rockchip: Add RK3572 DWC3 controller Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 21/27] phy: rockchip-inno-usb2: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 22/27] phy: rockchip-naneng-combphy: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 23/27] usb: dwc3: Configure RK3572 PIPE port before discovery Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 24/27] mmc: dw_mmc-rockchip: Keep RK3572 NVM domain powered Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 25/27] dt-bindings: arm: rockchip: Add Forlinx OK3572-C Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 26/27] arm64: dts: rockchip: Add RK3572 SoC Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 27/27] arm64: dts: rockchip: Add initial support for Forlinx OK3572-C Cunhao Lu via B4 Relay
2026-10-21 23:00 ` [PATCH 00/27] rockchip: Add RK3572 and Forlinx OK3572-C support Shawn Lin
2026-10-22 6:37 ` Cunhao Lu
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