From: "Heiko Stübner" <heiko@sntech.de>
To: Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Elaine Zhang <zhangqing@rock-chips.com>,
Lee Jones <lee@kernel.org>, Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Richard Cochran <richardcochran@gmail.com>,
Ulf Hansson <ulfh@kernel.org>, Andi Shyti <andi.shyti@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
Jisheng Zhang <jszhang@kernel.org>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@kernel.org>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
David Wu <david.wu@rock-chips.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Maxime Chevallier <maxime.chevallier@bootlin.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
Jaehoon Chung <jh80.chung@samsung.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
1579567540@qq.com
Cc: Cunhao Lu <1579567540@qq.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
mfd@lists.linux.dev, linux-gpio@vger.kernel.org,
netdev@vger.kernel.org, linux-pm@vger.kernel.org,
linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org,
linux-mmc@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-phy@lists.infradead.org, linux-usb@vger.kernel.org
Subject: Re: [PATCH 07/27] clk: rockchip: Add RK3572 clock and reset support
Date: Thu, 22 Oct 2026 00:26:36 +0200 [thread overview]
Message-ID: <2339330.72vocr9iq0@diego> (raw)
In-Reply-To: <20261022-add-board-ok3572-c-v1-7-0b0fd85a31ee@qq.com>
Hi,
Am Mittwoch, 21. Oktober 2026, 18:11:04 Mitteleuropäische Sommerzeit schrieb Cunhao Lu via B4 Relay:
> From: Cunhao Lu <1579567540@qq.com>
>
> CPU clocks are managed by SCMI. Keep BPLL and LPLL enabled for firmware
> consumers.
>
> Signed-off-by: Cunhao Lu <1579567540@qq.com>
[...]
> diff --git a/drivers/clk/rockchip/clk-rk3572.c b/drivers/clk/rockchip/clk-rk3572.c
> new file mode 100644
> index 000000000000..78fd35f5f27d
> --- /dev/null
> +++ b/drivers/clk/rockchip/clk-rk3572.c
> @@ -0,0 +1,1972 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (c) 2025 Rockchip Electronics Co., Ltd.
> + * Author: Elaine Zhang <zhangqing@rock-chips.com>
> + */
As you didn't write this driver on your own and even kept the original
author, please also credit the original author in the commit itself.
This can be done for example with something like
git commit --amend --author="Elaine Zhang <zhangqing@rock-chips.com>"
and in the commit also have both signed-offs-by, aka Elaine first
then yours below as the submitter, i.e. like
+++++++++++
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[document what changes you did inside the brackets]
Signed-off-by: Cunhao Lu <1579567540@qq.com>
+++++++++++
The same applies to all commits coming from the Rockchip vendor kernel.
Thanks
Heiko
next prev parent reply other threads:[~2026-10-21 22:27 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 16:10 [PATCH 00/27] rockchip: Add RK3572 and Forlinx OK3572-C support Cunhao Lu via B4 Relay
2026-10-21 16:10 ` [PATCH 01/27] dt-bindings: clock: rockchip: Add RK3572 CRU Cunhao Lu via B4 Relay
2026-10-21 16:10 ` [PATCH 02/27] dt-bindings: power: rockchip: Add RK3572 power domains Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 03/27] dt-bindings: soc: rockchip: Add RK3572 PMU and GRF Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 04/27] dt-bindings: mfd: syscon: Add RK3572 QoS register compatible Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 05/27] dt-bindings: pinctrl: rockchip: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 06/27] dt-bindings: gpio: rockchip: Add RK3572 GPIO banks Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 07/27] clk: rockchip: Add RK3572 clock and reset support Cunhao Lu via B4 Relay
2026-10-21 22:26 ` Heiko Stübner [this message]
2026-10-22 6:09 ` Cunhao Lu
2026-10-22 7:38 ` Heiko Stübner
2026-10-22 8:31 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 08/27] pinctrl: rockchip: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 09/27] gpio: rockchip: Add RK3572 GPIO support Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 10/27] pmdomain: rockchip: Add RK3572 boot peripheral domains Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 11/27] dt-bindings: i2c: rk3x: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 12/27] dt-bindings: serial: snps-dw-apb-uart: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 13/27] dt-bindings: mmc: rockchip: Add RK3572 controllers Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 14/27] dt-bindings: net: rockchip-dwmac: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 17:14 ` Andrew Lunn
2026-10-22 6:03 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 15/27] dt-bindings: thermal: rockchip: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 16/27] net: stmmac: dwmac-rk: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 17:09 ` Andrew Lunn
2026-10-22 5:33 ` Cunhao Lu
2026-10-21 16:11 ` [PATCH 17/27] thermal: rockchip: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 18/27] dt-bindings: phy: rockchip-inno-usb2: Add RK3572 Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 19/27] dt-bindings: phy: rockchip-naneng-combphy: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 20/27] dt-bindings: usb: rockchip: Add RK3572 DWC3 controller Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 21/27] phy: rockchip-inno-usb2: Add RK3572 support Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 22/27] phy: rockchip-naneng-combphy: " Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 23/27] usb: dwc3: Configure RK3572 PIPE port before discovery Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 24/27] mmc: dw_mmc-rockchip: Keep RK3572 NVM domain powered Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 25/27] dt-bindings: arm: rockchip: Add Forlinx OK3572-C Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 26/27] arm64: dts: rockchip: Add RK3572 SoC Cunhao Lu via B4 Relay
2026-10-21 16:11 ` [PATCH 27/27] arm64: dts: rockchip: Add initial support for Forlinx OK3572-C Cunhao Lu via B4 Relay
2026-10-21 23:00 ` [PATCH 00/27] rockchip: Add RK3572 and Forlinx OK3572-C support Shawn Lin
2026-10-22 6:37 ` Cunhao Lu
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