Re: [PATCH net-next 1/3] net: stmmac: xgmac: Disable RX FIFO Overflow interrupts

["G Thomas, Rohan" <rohan.g.thomas@altera.com>]

Hi Andrew,

Thanks for reviewing the patch.

On 7/14/2025 7:04 PM, Andrew Lunn wrote:
> On Mon, Jul 14, 2025 at 03:59:17PM +0800, Rohan G Thomas via B4 Relay wrote:
>> From: Rohan G Thomas <rohan.g.thomas@altera.com>
>>
>> Enabling RX FIFO Overflow interrupts is counterproductive
>> and causes an interrupt storm when RX FIFO overflows.
>> Disabling this interrupt has no side effect and eliminates
>> interrupt storms when the RX FIFO overflows.
>>
>> Commit 8a7cb245cf28 ("net: stmmac: Do not enable RX FIFO
>> overflow interrupts") disables RX FIFO overflow interrupts
>> for DWMAC4 IP and removes the corresponding handling of
>> this interrupt. This patch is doing the same thing for
>> XGMAC IP.
>>
>> Signed-off-by: Rohan G Thomas <rohan.g.thomas@altera.com>
>> Reviewed-by: Matthew Gerlach <matthew.gerlach@altera.com>
> 
> Please take a read of:
> 
> https://www.kernel.org/doc/html/latest/process/maintainer-netdev.html
> 
> This appears to be a fixed, so the Subject: line should indicate this.
> Please also include a Fixes: tag, and Cc: stable.

Agreed. Will do in the next version.

> 
>> ---
>>   drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 4 ----
>>   1 file changed, 4 deletions(-)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
>> index 5dcc95bc0ad28b756accf9670c5fa00aa94fcfe3..7201a38842651a865493fce0cefe757d6ae9bafa 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
>> @@ -203,10 +203,6 @@ static void dwxgmac2_dma_rx_mode(struct stmmac_priv *priv, void __iomem *ioaddr,
>>   	}
>>   
>>   	writel(value, ioaddr + XGMAC_MTL_RXQ_OPMODE(channel));
>> -
>> -	/* Enable MTL RX overflow */
>> -	value = readl(ioaddr + XGMAC_MTL_QINTEN(channel));
>> -	writel(value | XGMAC_RXOIE, ioaddr + XGMAC_MTL_QINTEN(channel));
> 
> What is the reset default? Would it make sense to explicitly disable
> it, rather than never enable it? What does 8a7cb245cf28 do?

The RX FIFO Overflow interrupt is disabled by default on reset. Commit
8a7cb245cf28 also avoids enabling the interrupt rather than disabling
it. This commit mirrors the same thing for the XGMAC IP.

> 
>      Andrew
> 
> ---
> pw-bot: cr
> 
> 

Best Regards,
Rohan