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From: Andrew Lunn <andrew@lunn.ch>
To: rohan.g.thomas@altera.com
Cc: Andrew Lunn <andrew+netdev@lunn.ch>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	Romain Gantois <romain.gantois@bootlin.com>,
	netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Matthew Gerlach <matthew.gerlach@altera.com>
Subject: Re: [PATCH net-next 2/3] net: stmmac: xgmac: Correct supported speed modes
Date: Mon, 14 Jul 2025 15:42:43 +0200	[thread overview]
Message-ID: <b192c96a-2989-4bdf-ba4f-8b7bcfd09cfa@lunn.ch> (raw)
In-Reply-To: <20250714-xgmac-minor-fixes-v1-2-c34092a88a72@altera.com>

On Mon, Jul 14, 2025 at 03:59:18PM +0800, Rohan G Thomas via B4 Relay wrote:
> From: Rohan G Thomas <rohan.g.thomas@altera.com>
> 
> Correct supported speed modes as per the XGMAC databook.
> Commit 9cb54af214a7 ("net: stmmac: Fix IP-cores specific
> MAC capabilities") removes support for 10M, 100M and
> 1000HD. 1000HD is not supported by XGMAC IP, but it does
> support 10M and 100M FD mode, and it also supports 10M and
> 100M HD mode if the HDSEL bit is set in the MAC_HW_FEATURE0
> reg. This commit adds support for 10M and 100M speed modes
> for XGMAC IP.

> +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
> @@ -405,6 +405,7 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr,
>  	dma_cap->sma_mdio = (hw_cap & XGMAC_HWFEAT_SMASEL) >> 5;
>  	dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4;
>  	dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3;
> +	dma_cap->mbps_10_100 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1;

The commit message does not mention this change.

What does XGMAC_HWFEAT_GMIISEL mean? That a SERDES style interface is
not being used? Could that be why Serge removed these speeds? He was
looking at systems with a SERDES, and they don't support slower
speeds?

	Andrew

  reply	other threads:[~2025-07-14 13:42 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-14  7:59 [PATCH net-next 0/3] net: stmmac: xgmac: Minor fixes Rohan G Thomas via B4 Relay
2025-07-14  7:59 ` [PATCH net-next 1/3] net: stmmac: xgmac: Disable RX FIFO Overflow interrupts Rohan G Thomas via B4 Relay
2025-07-14 13:34   ` Andrew Lunn
2025-07-15 13:16     ` G Thomas, Rohan
2025-07-15 13:24       ` Andrew Lunn
2025-07-14  7:59 ` [PATCH net-next 2/3] net: stmmac: xgmac: Correct supported speed modes Rohan G Thomas via B4 Relay
2025-07-14 13:42   ` Andrew Lunn [this message]
2025-07-15 13:33     ` G Thomas, Rohan
2025-07-15 15:10       ` Andrew Lunn
2025-07-17 11:47       ` Serge Semin
2025-07-17 12:59         ` G Thomas, Rohan
2025-07-17 17:22           ` Serge Semin
2025-07-18 11:38             ` G Thomas, Rohan
2025-07-24 16:18         ` G Thomas, Rohan
2025-07-24 17:56           ` Serge Semin
2025-07-25  9:18             ` G Thomas, Rohan
2025-07-17  6:45   ` Russell King (Oracle)
2025-07-17 12:26     ` G Thomas, Rohan
2025-07-14  7:59 ` [PATCH net-next 3/3] net: stmmac: Set CIC bit only for TX queues with COE Rohan G Thomas via B4 Relay
2025-07-14 13:40   ` Simon Horman
2025-07-15 13:44     ` G Thomas, Rohan
2025-07-16  8:22       ` Simon Horman
2025-07-17  6:20         ` G Thomas, Rohan
2025-07-18 20:06           ` Simon Horman
2025-07-24 16:03             ` G Thomas, Rohan

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