Re: [PATCH v2 4/4] arm64: dts: rockchip: Make Jaguar PCIe-refclk pin use pull-up config

[Shawn Lin <shawn.lin@rock-chips.com>]

在 2026/02/10 星期二 16:03, Heiko Stuebner 写道:
> From: Heiko Stuebner <heiko.stuebner@cherry.de>
> 
> Different to RK3588-Tiger, on RK3588-Jaguar the signal enabling the
> PCIe-refclk generator controls a transistor which in turn controls the
> output-enable input of the PI6C557 and there's no external Pull-Up or
> Pull-Down between the SoC and the transistor gate.
> 
> On Tiger the pin is directly connected to the PDn input which has an
> internal pull up.
> 
> So match that behaviour on Jaguar by changing the pin config to enable
> the SoC's pull-up config.
> 
> Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
> Fixes: 0ec7e1096332 ("arm64: dts: rockchip: add PCIe3 support on rk3588-jaguar")
> Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
> ---
>   arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
> index e21ad7575cb6..5f5d89a33a4a 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
> @@ -579,7 +579,7 @@ led1_pin: led1-pin {
>   
>   	pcie30x4 {
>   		pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 {
> -			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
> +			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;

If Jaguar need support L1 substate, I guess it should be changed to
fucntion IO again instead of GPIO. From the refclk design which uses
pcie30x4_clkreqn_m0 as enable control in active low mode , it's fine to
support these low power mode.

Otherwise, fine with me

Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>

>   		};
>   
>   		pcie30x4_perstn_m0: pcie30x4-perstn-m0 {
>