Re:Re: Re:[PATCH] drm/panel-edp: Add BOE NV140FHM-N4Z panel entry

["Andy Yan" <andyshrk@163.com>]

Hi Doug,

在 2025-01-15 00:44:41，"Doug Anderson" <dianders@chromium.org> 写道：
>Hi,
>
>On Tue, Jan 14, 2025 at 1:05 AM Andy Yan <andyshrk@163.com> wrote:
>>
>>
>> Hi All,
>>
>> At 2025-01-13 18:17:38, "Andy Yan" <andyshrk@163.com> wrote:
>> >
>> >Sorry, please don't merge this patch. after further testing,
>> >I found that there are still some changce, it can't read edid.
>>
>> It turns out that we need set hpd-reliable-delay-ms = 120 in dts to ensure
>> the right time to access edid.
>
>That seems awfully high and feels likely to be a problem with your
>board design and not the panel. Are you sure HPD is even hooked up
>properly on your board? Maybe you're missing a pullup/pulldown config
>somewhere? Would it be better to just specify "no-hpd" and get the
>full "HPD absent" delay?
>
>
>> So the patch is ok, it is ready for review.
>>
>> >
>> >At 2025-01-13 16:59:54, "Andy Yan" <andyshrk@163.com> wrote:
>> >>Add an eDP panel entry for BOE NV140FHM-N4Z.
>> >>
>> >>No datasheet found for this panel.
>
>I seem to be able to find a datasheet for something that calls itself
>NV140FHM-N4Z, but it might be a different HW version since it has a
>different ID. In my datasheet, though, "prepare_to_enable" should be
>80 for this panel, not 200. That matches another nearby panel
>"NV140WUM-N41". Are you sure you need 200?

I am not sure about that value, 
I searched on the internet, and can't find a datasheet match BOE NV140FHM-NZ
I set this value according: NV140FHM-N41, and then do many tests to see if it has
any problem.

http://www.tfinno.com/PIC/PIC/20215121628440.pdf

[    3.021700] panel-simple-dp-aux aux-fded0000.edp: Detected BOE NV140FHM-NZ (0x0b09)



>
>
>> >>edid:
>> >>00 ff ff ff ff ff ff 00 09 e5 09 0b 00 00 00 00
>> >>01 20 01 04 a5 1f 11 78 03 9b 75 99 5b 5d 8f 2a
>> >>23 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01
>> >>01 01 01 01 01 01 c8 37 80 cc 70 38 28 40 6c 30
>> >>aa 00 35 ae 10 00 00 1a 00 00 00 fd 00 30 3c 43
>> >>43 8f 01 0a 20 20 20 20 20 20 00 00 00 fe 00 42
>> >>4f 45 20 48 46 0a 20 20 20 20 20 20 00 00 00 fe
>> >>00 4e 56 31 34 30 46 48 4d 2d 4e 34 5a 0a 00 35
>> >>
>> >>Signed-off-by: Andy Yan <andyshrk@163.com>
>> >>---
>> >>
>> >> drivers/gpu/drm/panel/panel-edp.c | 1 +
>> >> 1 file changed, 1 insertion(+)
>
>FWIW it's good that Thomas replied to your patch, since that was the
>only thing that showed up in my inbox. Your initial patch showed up as
>spam for me. :( Not sure why, though...
>
>
>> >>diff --git a/drivers/gpu/drm/panel/panel-edp.c b/drivers/gpu/drm/panel/panel-edp.c
>> >>index 94a46241dece..a3402b76aa3e 100644
>> >>--- a/drivers/gpu/drm/panel/panel-edp.c
>> >>+++ b/drivers/gpu/drm/panel/panel-edp.c
>> >>@@ -1909,6 +1909,7 @@ static const struct edp_panel_entry edp_panels[] = {
>> >>      EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ac5, &delay_200_500_e50, "NV116WHM-N4C"),
>> >>      EDP_PANEL_ENTRY('B', 'O', 'E', 0x0ae8, &delay_200_500_e50_p2e80, "NV140WUM-N41"),
>> >>      EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b34, &delay_200_500_e80, "NV122WUM-N41"),
>> >>+     EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b09, &delay_200_500_e50_p2e200, "NV140FHM-NZ"),
>> >>      EDP_PANEL_ENTRY('B', 'O', 'E', 0x0b43, &delay_200_500_e200, "NV140FHM-T09"),
>
>This is mis-sorted. 0xb09 should be _before_ 0x0b34. I'll often fix
>this up when applying (though it's more work for me), but since I had
>a question above about delay_200_500_e50_p2e200 vs.
>delay_200_500_e50_p2e80 maybe you can answer and also send a v2 with
>the sort order fixed.
>
>-Doug