* [PATCH v5 1/4] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse
2016-09-02 3:16 [PATCH v5 0/4] nvmem: rockchip-efuse: support more rockchip SoCs Finley Xiao
@ 2016-09-02 3:16 ` Finley Xiao
2016-09-02 3:54 ` Doug Anderson
2016-09-12 15:35 ` Rob Herring
2016-09-02 3:16 ` [PATCH v5 2/4] ARM: dts: rockchip: " Finley Xiao
` (2 subsequent siblings)
3 siblings, 2 replies; 12+ messages in thread
From: Finley Xiao @ 2016-09-02 3:16 UTC (permalink / raw)
To: srinivas.kandagatla, maxime.ripard, robh+dt, mark.rutland, heiko,
linux, catalin.marinas, will.deacon, dianders
Cc: linux-arm-kernel, linux-rockchip, devicetree, linux-kernel, wxt,
zhengsq, jay.xu, huangtao, tony.xie, cl, Finley Xiao
Rk3399-efuse is organized as 32bits by 32 one-time programmable electrical
fuses. The efuse of earlier SoCs are organized as 32bits by 8 one-time
programmable electrical fuses with random access interface.
Add different device tree compatible string for different SoCs to be able
to differentiate between the two. The old binding is of course preserved,
though deprecated.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
index 8f86ab3..94aeeea 100644
--- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
+++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.txt
@@ -1,11 +1,20 @@
= Rockchip eFuse device tree bindings =
Required properties:
-- compatible: Should be "rockchip,rockchip-efuse"
+- compatible: Should be one of the following.
+ - "rockchip,rk3066a-efuse" - for RK3066a SoCs.
+ - "rockchip,rk3188-efuse" - for RK3188 SoCs.
+ - "rockchip,rk3288-efuse" - for RK3288 SoCs.
+ - "rockchip,rk3399-efuse" - for RK3399 SoCs.
- reg: Should contain the registers location and exact eFuse size
- clocks: Should be the clock id of eFuse
- clock-names: Should be "pclk_efuse"
+Deprecated properties:
+- compatible: "rockchip,rockchip-efuse"
+ Old efuse compatible value compatible to rk3066a, rk3188 and rk3288
+ efuses
+
= Data cells =
Are child nodes of eFuse, bindings of which as described in
bindings/nvmem/nvmem.txt
@@ -13,7 +22,7 @@ bindings/nvmem/nvmem.txt
Example:
efuse: efuse@ffb40000 {
- compatible = "rockchip,rockchip-efuse";
+ compatible = "rockchip,rk3288-efuse";
reg = <0xffb40000 0x20>;
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v5 2/4] ARM: dts: rockchip: update compatible strings for Rockchip efuse
2016-09-02 3:16 [PATCH v5 0/4] nvmem: rockchip-efuse: support more rockchip SoCs Finley Xiao
2016-09-02 3:16 ` [PATCH v5 1/4] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse Finley Xiao
@ 2016-09-02 3:16 ` Finley Xiao
2016-09-02 3:54 ` Doug Anderson
2016-09-02 15:48 ` Heiko Stübner
2016-09-02 3:16 ` [PATCH v5 3/4] arm64: dts: rockchip: add efuse0 device node for rk3399 Finley Xiao
2016-09-02 3:16 ` [PATCH v5 4/4] nvmem: rockchip-efuse: add rk3399-efuse support Finley Xiao
3 siblings, 2 replies; 12+ messages in thread
From: Finley Xiao @ 2016-09-02 3:16 UTC (permalink / raw)
To: srinivas.kandagatla, maxime.ripard, robh+dt, mark.rutland, heiko,
linux, catalin.marinas, will.deacon, dianders
Cc: linux-arm-kernel, linux-rockchip, devicetree, linux-kernel, wxt,
zhengsq, jay.xu, huangtao, tony.xie, cl, Finley Xiao
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm/boot/dts/rk3066a.dtsi | 2 +-
arch/arm/boot/dts/rk3188.dtsi | 2 +-
arch/arm/boot/dts/rk3288.dtsi | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index c0ba86c..5387cc8 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -162,7 +162,7 @@
};
efuse: efuse@20010000 {
- compatible = "rockchip,rockchip-efuse";
+ compatible = "rockchip,rk3066a-efuse";
reg = <0x20010000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index 31f81b2..869e189 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -147,7 +147,7 @@
};
efuse: efuse@20010000 {
- compatible = "rockchip,rockchip-efuse";
+ compatible = "rockchip,rk3188-efuse";
reg = <0x20010000 0x4000>;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index cd33f01..0eadb96 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -1073,7 +1073,7 @@
};
efuse: efuse@ffb40000 {
- compatible = "rockchip,rockchip-efuse";
+ compatible = "rockchip,rk3288-efuse";
reg = <0xffb40000 0x20>;
#address-cells = <1>;
#size-cells = <1>;
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v5 3/4] arm64: dts: rockchip: add efuse0 device node for rk3399
2016-09-02 3:16 [PATCH v5 0/4] nvmem: rockchip-efuse: support more rockchip SoCs Finley Xiao
2016-09-02 3:16 ` [PATCH v5 1/4] nvmem: rockchip-efuse: update compatible strings for Rockchip efuse Finley Xiao
2016-09-02 3:16 ` [PATCH v5 2/4] ARM: dts: rockchip: " Finley Xiao
@ 2016-09-02 3:16 ` Finley Xiao
2016-09-02 3:53 ` Doug Anderson
2016-09-02 15:45 ` Heiko Stübner
2016-09-02 3:16 ` [PATCH v5 4/4] nvmem: rockchip-efuse: add rk3399-efuse support Finley Xiao
3 siblings, 2 replies; 12+ messages in thread
From: Finley Xiao @ 2016-09-02 3:16 UTC (permalink / raw)
To: srinivas.kandagatla, maxime.ripard, robh+dt, mark.rutland, heiko,
linux, catalin.marinas, will.deacon, dianders
Cc: linux-arm-kernel, linux-rockchip, devicetree, linux-kernel, wxt,
zhengsq, jay.xu, huangtao, tony.xie, cl, Finley Xiao
Add a efuse0 node in the device tree for the ARM64 rk3399 SoC.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index a6dd623..05b48e2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -721,6 +721,35 @@
status = "disabled";
};
+ efuse0: efuse@ff690000 {
+ compatible = "rockchip,rk3399-efuse";
+ reg = <0x0 0xff690000 0x0 0x80>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cru PCLK_EFUSE1024NS>;
+ clock-names = "pclk_efuse";
+
+ /* Data cells */
+ cpul_leakage: cpul-leakage {
+ reg = <0x1a 0x1>;
+ };
+ cpub_leakage: cpub-leakage {
+ reg = <0x17 0x1>;
+ };
+ gpu_leakage: gpu-leakage {
+ reg = <0x18 0x1>;
+ };
+ center_leakage: center-leakage {
+ reg = <0x19 0x1>;
+ };
+ logic_leakage: logic-leakage {
+ reg = <0x1b 0x1>;
+ };
+ wafer_info: wafer-info {
+ reg = <0x1c 0x1>;
+ };
+ };
+
pmucru: pmu-clock-controller@ff750000 {
compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>;
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v5 4/4] nvmem: rockchip-efuse: add rk3399-efuse support
2016-09-02 3:16 [PATCH v5 0/4] nvmem: rockchip-efuse: support more rockchip SoCs Finley Xiao
` (2 preceding siblings ...)
2016-09-02 3:16 ` [PATCH v5 3/4] arm64: dts: rockchip: add efuse0 device node for rk3399 Finley Xiao
@ 2016-09-02 3:16 ` Finley Xiao
2016-09-02 3:54 ` Doug Anderson
3 siblings, 1 reply; 12+ messages in thread
From: Finley Xiao @ 2016-09-02 3:16 UTC (permalink / raw)
To: srinivas.kandagatla, maxime.ripard, robh+dt, mark.rutland, heiko,
linux, catalin.marinas, will.deacon, dianders
Cc: linux-arm-kernel, linux-rockchip, devicetree, linux-kernel, wxt,
zhengsq, jay.xu, huangtao, tony.xie, cl, Finley Xiao
1) the efuse timing of rk3399 is different from earlier SoCs.
2) rk3399-efuse is organized as 32bits by 32 one-time programmable
electrical fuses, the efuse of earlier SoCs is organized as 32bits
by 8 one-time programmable electrical fuses with random access interface.
This patch adds a new read function for rk3399-efuse.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/nvmem/rockchip-efuse.c | 133 +++++++++++++++++++++++++++++++++++------
1 file changed, 114 insertions(+), 19 deletions(-)
diff --git a/drivers/nvmem/rockchip-efuse.c b/drivers/nvmem/rockchip-efuse.c
index 4d3f391..423907b 100644
--- a/drivers/nvmem/rockchip-efuse.c
+++ b/drivers/nvmem/rockchip-efuse.c
@@ -22,17 +22,29 @@
#include <linux/nvmem-provider.h>
#include <linux/slab.h>
#include <linux/of.h>
+#include <linux/of_platform.h>
#include <linux/platform_device.h>
-#define EFUSE_A_SHIFT 6
-#define EFUSE_A_MASK 0x3ff
-#define EFUSE_PGENB BIT(3)
-#define EFUSE_LOAD BIT(2)
-#define EFUSE_STROBE BIT(1)
-#define EFUSE_CSB BIT(0)
-
-#define REG_EFUSE_CTRL 0x0000
-#define REG_EFUSE_DOUT 0x0004
+#define RK3288_A_SHIFT 6
+#define RK3288_A_MASK 0x3ff
+#define RK3288_PGENB BIT(3)
+#define RK3288_LOAD BIT(2)
+#define RK3288_STROBE BIT(1)
+#define RK3288_CSB BIT(0)
+
+#define RK3399_A_SHIFT 16
+#define RK3399_A_MASK 0x3ff
+#define RK3399_NBYTES 4
+#define RK3399_STROBSFTSEL BIT(9)
+#define RK3399_RSB BIT(7)
+#define RK3399_PD BIT(5)
+#define RK3399_PGENB BIT(3)
+#define RK3399_LOAD BIT(2)
+#define RK3399_STROBE BIT(1)
+#define RK3399_CSB BIT(0)
+
+#define REG_EFUSE_CTRL 0x0000
+#define REG_EFUSE_DOUT 0x0004
struct rockchip_efuse_chip {
struct device *dev;
@@ -40,8 +52,8 @@ struct rockchip_efuse_chip {
struct clk *clk;
};
-static int rockchip_efuse_read(void *context, unsigned int offset,
- void *val, size_t bytes)
+static int rockchip_rk3288_efuse_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
{
struct rockchip_efuse_chip *efuse = context;
u8 *buf = val;
@@ -53,27 +65,82 @@ static int rockchip_efuse_read(void *context, unsigned int offset,
return ret;
}
- writel(EFUSE_LOAD | EFUSE_PGENB, efuse->base + REG_EFUSE_CTRL);
+ writel(RK3288_LOAD | RK3288_PGENB, efuse->base + REG_EFUSE_CTRL);
udelay(1);
while (bytes--) {
writel(readl(efuse->base + REG_EFUSE_CTRL) &
- (~(EFUSE_A_MASK << EFUSE_A_SHIFT)),
+ (~(RK3288_A_MASK << RK3288_A_SHIFT)),
efuse->base + REG_EFUSE_CTRL);
writel(readl(efuse->base + REG_EFUSE_CTRL) |
- ((offset++ & EFUSE_A_MASK) << EFUSE_A_SHIFT),
+ ((offset++ & RK3288_A_MASK) << RK3288_A_SHIFT),
efuse->base + REG_EFUSE_CTRL);
udelay(1);
writel(readl(efuse->base + REG_EFUSE_CTRL) |
- EFUSE_STROBE, efuse->base + REG_EFUSE_CTRL);
+ RK3288_STROBE, efuse->base + REG_EFUSE_CTRL);
udelay(1);
*buf++ = readb(efuse->base + REG_EFUSE_DOUT);
writel(readl(efuse->base + REG_EFUSE_CTRL) &
- (~EFUSE_STROBE), efuse->base + REG_EFUSE_CTRL);
+ (~RK3288_STROBE), efuse->base + REG_EFUSE_CTRL);
+ udelay(1);
+ }
+
+ /* Switch to standby mode */
+ writel(RK3288_PGENB | RK3288_CSB, efuse->base + REG_EFUSE_CTRL);
+
+ clk_disable_unprepare(efuse->clk);
+
+ return 0;
+}
+
+static int rockchip_rk3399_efuse_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ struct rockchip_efuse_chip *efuse = context;
+ unsigned int addr_start, addr_end, addr_offset, addr_len;
+ u32 out_value;
+ u8 *buf;
+ int ret, i = 0;
+
+ ret = clk_prepare_enable(efuse->clk);
+ if (ret < 0) {
+ dev_err(efuse->dev, "failed to prepare/enable efuse clk\n");
+ return ret;
+ }
+
+ addr_start = rounddown(offset, RK3399_NBYTES) / RK3399_NBYTES;
+ addr_end = roundup(offset + bytes, RK3399_NBYTES) / RK3399_NBYTES;
+ addr_offset = offset % RK3399_NBYTES;
+ addr_len = addr_end - addr_start;
+
+ buf = kzalloc(sizeof(*buf) * addr_len * RK3399_NBYTES, GFP_KERNEL);
+ if (!buf) {
+ clk_disable_unprepare(efuse->clk);
+ return -ENOMEM;
+ }
+
+ writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
+ efuse->base + REG_EFUSE_CTRL);
+ udelay(1);
+ while (addr_len--) {
+ writel(readl(efuse->base + REG_EFUSE_CTRL) | RK3399_STROBE |
+ ((addr_start++ & RK3399_A_MASK) << RK3399_A_SHIFT),
+ efuse->base + REG_EFUSE_CTRL);
udelay(1);
+ out_value = readl(efuse->base + REG_EFUSE_DOUT);
+ writel(readl(efuse->base + REG_EFUSE_CTRL) & (~RK3399_STROBE),
+ efuse->base + REG_EFUSE_CTRL);
+ udelay(1);
+
+ memcpy(&buf[i], &out_value, RK3399_NBYTES);
+ i += RK3399_NBYTES;
}
/* Switch to standby mode */
- writel(EFUSE_PGENB | EFUSE_CSB, efuse->base + REG_EFUSE_CTRL);
+ writel(RK3399_PD | RK3399_CSB, efuse->base + REG_EFUSE_CTRL);
+
+ memcpy(val, buf + addr_offset, bytes);
+
+ kfree(buf);
clk_disable_unprepare(efuse->clk);
@@ -89,7 +156,27 @@ static struct nvmem_config econfig = {
};
static const struct of_device_id rockchip_efuse_match[] = {
- { .compatible = "rockchip,rockchip-efuse", },
+ /* deprecated but kept around for dts binding compatibility */
+ {
+ .compatible = "rockchip,rockchip-efuse",
+ .data = (void *)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3066a-efuse",
+ .data = (void *)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3188-efuse",
+ .data = (void *)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3288-efuse",
+ .data = (void *)&rockchip_rk3288_efuse_read,
+ },
+ {
+ .compatible = "rockchip,rk3399-efuse",
+ .data = (void *)&rockchip_rk3399_efuse_read,
+ },
{ /* sentinel */},
};
MODULE_DEVICE_TABLE(of, rockchip_efuse_match);
@@ -99,6 +186,14 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
struct resource *res;
struct nvmem_device *nvmem;
struct rockchip_efuse_chip *efuse;
+ const struct of_device_id *match;
+ struct device *dev = &pdev->dev;
+
+ match = of_match_device(dev->driver->of_match_table, dev);
+ if (!match || !match->data) {
+ dev_err(dev, "failed to get match data\n");
+ return -EINVAL;
+ }
efuse = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_efuse_chip),
GFP_KERNEL);
@@ -116,7 +211,7 @@ static int rockchip_efuse_probe(struct platform_device *pdev)
efuse->dev = &pdev->dev;
econfig.size = resource_size(res);
- econfig.reg_read = rockchip_efuse_read;
+ econfig.reg_read = match->data;
econfig.priv = efuse;
econfig.dev = efuse->dev;
nvmem = nvmem_register(&econfig);
--
2.7.4
^ permalink raw reply [flat|nested] 12+ messages in thread