From: Paolo Bonzini <pbonzini@redhat.com>
To: Andy Lutomirski <luto@kernel.org>, X86 ML <x86@kernel.org>
Cc: kvm list <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Borislav Petkov <bpetkov@suse.de>,
Thomas Garnier <thgarnie@google.com>,
Jim Mattson <jmattson@google.com>
Subject: Re: [PATCH v2 0/7] KVM TSS cleanups and speedups
Date: Wed, 22 Feb 2017 16:13:46 +0100 [thread overview]
Message-ID: <245433d4-8039-5dc6-aef8-5611bc9b604d@redhat.com> (raw)
In-Reply-To: <cover.1487704145.git.luto@kernel.org>
On 21/02/2017 20:14, Andy Lutomirski wrote:
> The first four patches here are intended to be straightforward
> cleanups and to make a better base for Thomas' GDT series. They may
> be a slight speedup, too, because they remove an STR instruction
> from the VMX entry path.
>
> The last two patches are a reasonably large speedup but need careful
> review.
>
> FWIW, I can see lots of additional easy-ish speedups here. For example:
>
> - The GDT reload on VM exit isn't really needed at all. Instead let's
> just change the kernel limit to 0xFFFF. Doing that naively would
> waste memory, but doing it carefully on top of Thomas' series would
> be straightforward and almost free.
>
> - RDMSR from MSR_GS_BASE is totally pointless.
>
> - Once I or someone finishes the FSGSBASE series, we get a big speedup
> there.
>
> - The LDT reload code should be split up and optimized better, I think.
>
> Changes from v1:
> - Fix some changelog typos.
> - Fix the bug that Paolo found.
> - Rename the helpers to make their usage more obvious.
> - Move clearing __tss_limit_invalid into force_reload_TR() as a tiny
> optimization.
> - Add a test case. It doesn't test all the machinations, but at least
> it checks basic functionality.
>
> Andy Lutomirski (7):
> x86/asm: Define the kernel TSS limit in a macro
> x86/kvm/vmx: Don't fetch the TSS base from the GDT
> x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels
> x86/kvm/vmx: Simplify segment_base()
> x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss
> x86/kvm/vmx: Defer TR reload after VM exit
> selftests/x86: Add a basic selftest for ioperm
>
> arch/x86/include/asm/desc.h | 62 +++++++++++--
> arch/x86/include/asm/processor.h | 12 ++-
> arch/x86/kernel/ioport.c | 11 +++
> arch/x86/kernel/process.c | 10 ++
> arch/x86/kvm/vmx.c | 63 ++++++-------
> tools/testing/selftests/x86/Makefile | 2 +-
> tools/testing/selftests/x86/ioperm.c | 171 +++++++++++++++++++++++++++++++++++
> 7 files changed, 284 insertions(+), 47 deletions(-)
> create mode 100644 tools/testing/selftests/x86/ioperm.c
>
I pushed and tagged before seeing this v2. :( The differences seem to
be x86-only, so I suppose Ingo can handle them if you resubmit.
Paolo
next prev parent reply other threads:[~2017-02-22 15:13 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-21 19:14 Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 1/7] x86/asm: Define the kernel TSS limit in a macro Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 2/7] x86/kvm/vmx: Don't fetch the TSS base from the GDT Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 3/7] x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 4/7] x86/kvm/vmx: Simplify segment_base() Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 5/7] x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 6/7] x86/kvm/vmx: Defer TR reload after VM exit Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 7/7] selftests/x86: Add a basic selftest for ioperm Andy Lutomirski
2017-02-22 15:13 ` Paolo Bonzini [this message]
2017-02-22 15:17 ` [PATCH v2 0/7] KVM TSS cleanups and speedups Andy Lutomirski
2017-02-22 15:25 ` Paolo Bonzini
2017-02-22 15:36 ` Andy Lutomirski
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