From: Andy Lutomirski <luto@kernel.org>
To: Paolo Bonzini <pbonzini@redhat.com>, X86 ML <x86@kernel.org>
Cc: kvm list <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Borislav Petkov <bpetkov@suse.de>,
Thomas Garnier <thgarnie@google.com>,
Jim Mattson <jmattson@google.com>,
Andy Lutomirski <luto@kernel.org>
Subject: [PATCH v2 1/7] x86/asm: Define the kernel TSS limit in a macro
Date: Tue, 21 Feb 2017 11:14:08 -0800 [thread overview]
Message-ID: <b63a2b69fd6a03cd6beea38f2049d2c4c8656436.1487704145.git.luto@kernel.org> (raw)
In-Reply-To: <cover.1487704145.git.luto@kernel.org>
In-Reply-To: <cover.1487704145.git.luto@kernel.org>
Rather than open-coding the kernel TSS limit in set_tss_desc(), make
it a real macro near the TSS layout definition.
This is purely a cleanup.
Cc: Thomas Garnier <thgarnie@google.com>
Cc: Jim Mattson <jmattson@google.com>
Signed-off-by: Andy Lutomirski <luto@kernel.org>
---
arch/x86/include/asm/desc.h | 10 +---------
arch/x86/include/asm/processor.h | 10 ++++++++++
2 files changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index 12080d87da3b..2e781bcc5e12 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -177,16 +177,8 @@ static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
struct desc_struct *d = get_cpu_gdt_table(cpu);
tss_desc tss;
- /*
- * sizeof(unsigned long) coming from an extra "long" at the end
- * of the iobitmap. See tss_struct definition in processor.h
- *
- * -1? seg base+limit should be pointing to the address of the
- * last valid byte
- */
set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS,
- IO_BITMAP_OFFSET + IO_BITMAP_BYTES +
- sizeof(unsigned long) - 1);
+ __KERNEL_TSS_LIMIT);
write_gdt_entry(d, entry, &tss, DESC_TSS);
}
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index e6cfe7ba2d65..feb2ab95b8f6 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -342,6 +342,16 @@ struct tss_struct {
DECLARE_PER_CPU_SHARED_ALIGNED(struct tss_struct, cpu_tss);
+/*
+ * sizeof(unsigned long) coming from an extra "long" at the end
+ * of the iobitmap.
+ *
+ * -1? seg base+limit should be pointing to the address of the
+ * last valid byte
+ */
+#define __KERNEL_TSS_LIMIT \
+ (IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1)
+
#ifdef CONFIG_X86_32
DECLARE_PER_CPU(unsigned long, cpu_current_top_of_stack);
#endif
--
2.9.3
next prev parent reply other threads:[~2017-02-21 19:16 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-21 19:14 [PATCH v2 0/7] KVM TSS cleanups and speedups Andy Lutomirski
2017-02-21 19:14 ` Andy Lutomirski [this message]
2017-02-21 19:14 ` [PATCH v2 2/7] x86/kvm/vmx: Don't fetch the TSS base from the GDT Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 3/7] x86/kvm/vmx: Get rid of segment_base() on 64-bit kernels Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 4/7] x86/kvm/vmx: Simplify segment_base() Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 5/7] x86/asm/64: Drop __cacheline_aligned from struct x86_hw_tss Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 6/7] x86/kvm/vmx: Defer TR reload after VM exit Andy Lutomirski
2017-02-21 19:14 ` [PATCH v2 7/7] selftests/x86: Add a basic selftest for ioperm Andy Lutomirski
2017-02-22 15:13 ` [PATCH v2 0/7] KVM TSS cleanups and speedups Paolo Bonzini
2017-02-22 15:17 ` Andy Lutomirski
2017-02-22 15:25 ` Paolo Bonzini
2017-02-22 15:36 ` Andy Lutomirski
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