Re: [PATCH v2] cxl/port: Fix endpoint RAS error unmasking

[Dave Jiang <dave.jiang@intel.com>]

On 11/2/26 11:34 PM, Richard Cheng wrote:
> Moving endpoint RAS handling from cxl_pci to cxl_port left
> cxl_ras_unmask() checking whether port->uport_dev is a PCI device.
> Endpoint ports always use a cxl_memdev as uport_dev, so this check
> returns early and leaves the CXL RAS error masks unchanged.
> 
> Resolve the PCI device directly through the memdev's parent. Rename
> helper to cxl_endpoint_ras_unmask() and its param to endpoint to make
> its endpoint-only scope explicit.
> 
> Fixes: dab7162d0ae7 ("cxl/port: Move endpoint component register management to cxl_port")
> Signed-off-by: Richard Cheng <icheng@nvidia.com>

Applied to cxl/next:
ed574daa568d cxl/port: Fix endpoint RAS error unmasking

> ---
> Changelog:
> 
> v1 -> v2:
> - Clarify that endpoint ports always use a cxl_memdev as uport_dev, so
>   the PCI device check always skips endpoint RAS unmasking
> - Simplify the PCI device lookup to use the memdev's parent directly
> - Rename cxl_ras_unmask() to cxl_endpoint_ras_unmask() and its param to
>   endpoint to make the endpoint-only scope explicitly
> - Rephrase commit messages.
> 
> Reproducer is a QEMU Type-3 guest
> 
> 1. Ensure no CXL region is active and PCIe AER is enabled.
> 2. Restore the emulated RAS registers to their reset masks.
> 3. Reprobe cxl_pci and read the masks again.
> 
> ```
> BDF=$(basename "$(dirname "$(readlink -f /sys/bus/cxl/devices/mem0)")")
> BAR0=$(awk 'NR == 1 { print $1 }' /sys/bus/pci/devices/$BDF/resource)
> UNC_MASK=$(printf '0x%x' $((BAR0 + 0x1084)))
> COR_MASK=$(printf '0x%x' $((BAR0 + 0x1090)))
> 
> busybox devmem "$UNC_MASK" 32 0x1cfff
> busybox devmem "$COR_MASK" 32 0x7f
> 
> echo "$BDF" > /sys/bus/pci/drivers/cxl_pci/unbind
> echo "$BDF" > /sys/bus/pci/drivers/cxl_pci/bind
> udevadm settle
> 
> busybox devmem "$UNC_MASK" 32
> busybox devmem "$COR_MASK" 32
> ```
> 
> Before the fix, the masks remain 0x1cfff and 0x7f. After the fix,
> both masks read as zero.
> 
> Best regards,
> Richard Cheng.
> ---
>  drivers/cxl/port.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index c12fd0b89883..7b4726c7276d 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
> @@ -72,19 +72,21 @@ static int cxl_switch_port_probe(struct cxl_port *port)
>  	return 0;
>  }
>  
> -static int cxl_ras_unmask(struct cxl_port *port)
> +static int cxl_endpoint_ras_unmask(struct cxl_port *endpoint)
>  {
> +	struct cxl_memdev *cxlmd = to_cxl_memdev(endpoint->uport_dev);
> +	struct device *parent = cxlmd->dev.parent;
>  	struct pci_dev *pdev;
>  	void __iomem *addr;
>  	u32 orig_val, val, mask;
>  	u16 cap;
>  	int rc;
>  
> -	if (!dev_is_pci(port->uport_dev))
> +	if (!dev_is_pci(parent))
>  		return 0;
> -	pdev = to_pci_dev(port->uport_dev);
> +	pdev = to_pci_dev(parent);
>  
> -	if (!port->regs.ras) {
> +	if (!endpoint->regs.ras) {
>  		pci_dbg(pdev, "No RAS registers.\n");
>  		return 0;
>  	}
> @@ -98,7 +100,7 @@ static int cxl_ras_unmask(struct cxl_port *port)
>  		return rc;
>  
>  	if (cap & PCI_EXP_DEVCTL_URRE) {
> -		addr = port->regs.ras + CXL_RAS_UNCORRECTABLE_MASK_OFFSET;
> +		addr = endpoint->regs.ras + CXL_RAS_UNCORRECTABLE_MASK_OFFSET;
>  		orig_val = readl(addr);
>  
>  		mask = CXL_RAS_UNCORRECTABLE_MASK_MASK |
> @@ -110,7 +112,7 @@ static int cxl_ras_unmask(struct cxl_port *port)
>  	}
>  
>  	if (cap & PCI_EXP_DEVCTL_CERE) {
> -		addr = port->regs.ras + CXL_RAS_CORRECTABLE_MASK_OFFSET;
> +		addr = endpoint->regs.ras + CXL_RAS_CORRECTABLE_MASK_OFFSET;
>  		orig_val = readl(addr);
>  		val = orig_val & ~CXL_RAS_CORRECTABLE_MASK_MASK;
>  		writel(val, addr);
> @@ -152,7 +154,7 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
>  		devm_cxl_dport_rch_ras_setup(dport);
>  
>  	devm_cxl_port_ras_setup(port);
> -	if (cxl_ras_unmask(port))
> +	if (cxl_endpoint_ras_unmask(port))
>  		dev_dbg(&port->dev, "failed to unmask RAS interrupts\n");
>  
>  	/*
> 
> base-commit: d135ab453a7400a34930bdda1ef4bdc8acfac80e