Re: [PATCH] drm/msm/mdp5: drop support for MSM8998, SDM630 and SDM660

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 12/17/25 5:34 PM, Dmitry Baryshkov wrote:
> On Wed, Dec 17, 2025 at 06:05:31PM +0300, Alexey Minnekhanov wrote:
>> On 11.12.2025 04:25, Dmitry Baryshkov wrote:
>>> Currently MDP5 3.x (MSM8998, SDM630 and SDM660) platforms are support
>>> by both DPU and MDP5 drivers. Support for them in the DPU driver is
>>> mature enough, so it's no longer sensible to keep them enabled in the
>>> MDP5 driver. Not to mention that MSM8998 never used an MDP5 compatible
>>> string. Drop support for the MDP5 3.x genration inside the MDP5
>>> driver and migrate those to the DPU driver only.
>>>
>>> Note: this will break if one uses the DT generated before v6.3 as they
>>> had only the generic, "qcom,mdp5" compatible string for SDM630 and
>>> SDM660. However granted that we had two LTS releases inbetween I don't
>>> think it is an issue.
>>>
>>
>> I've retested DPU driver on our downstream release based on 6.18 (by
>> using msm.prefer_mdp5=false kernel cmdline parameter) on all devices
>> at my disposal, and I can confirm DPU driver working fine an all SDM660,
>> SDM636 ones, but not on SDM630. Some logs from sdm630-sony-nile-pioneer
>> (Sony Xperia XA2):
> 
> Unfortunately I only have SDM660 and video DSI usecase here. BTW: is
> your SDM636 / SDM660 using CMD or video panel?
> 
>>
>> [    2.356546] msm_dpu c901000.display-controller: bound c994000.dsi (ops
>> dsi_ops [msm])
>> [    2.357328] adreno 5000000.gpu: GPU speedbin fuse 146 (0x92), mapped to
>> opp-supp-hw 0x4
>> [    2.364802] msm_dpu c901000.display-controller: bound 5000000.gpu (ops
>> a3xx_ops [msm])
>> [    2.444649] [drm:dpu_kms_hw_init:1173] dpu hardware revision:0x30030000
>> [    2.449793] [drm] Initialized msm 1.13.0 for c901000.display-controller
>> on minor 1
>> ...
>> [    2.911900] [drm:_dpu_encoder_phys_cmd_wait_for_ctl_start:654] [dpu
>> error]enc33 intf1 ctl start interrupt wait failed
>> [    2.911916] [drm:dpu_kms_wait_for_commit_done:525] [dpu error]wait for
>> commit done returned -22
>> ...
>> [    3.176171] [drm:_dpu_encoder_phys_cmd_wait_for_ctl_start:654] [dpu
>> error]enc33 intf1 ctl start interrupt wait failed
>> [    3.176367] [drm:dpu_kms_wait_for_commit_done:525] [dpu error]wait for
>> commit done returned -22
>>
>> Which results in horrendous ~3-5 fps in shell.
>>
>> The block "enc33 intf1 ctl start interrupt wait failed" + "wait for
>> commit done returned -22" is repeated few times per second whenever
>> the display is turned on, and stops when it's turned off.
>>
>> Meanwhile it is working fine using MDP5 driver (msm.prefer_mdp5=true).
> 
> It's interesting. Would you please capture the devcoredump for the
> platform? There will be a lot of blocks, I'm interested in INTF_1, CTL
> and top_0.
> 
> Also, as a debugging check, would you mind patching
> dpu_encoder_phys_cmd_wait_for_commit_done() so that it always calls
> dpu_encoder_phys_cmd_wait_for_tx_complete()? I will check if there are
> any differences for CTL_START and similar registers, but it will take
> some time.
> 
>> Well, as fine as possible considering [1], using several FD_MESA_DEBUG
>> tricks to work around GPU issues.
>>
>> P.S. I have not yet tested MSM8998, but I can try if required
> 
> As far as I remember, MDP5 on MSM8998 has never been wired (as in never
> committed to the DTSI). Angelo has enabled and Freebox people have
> tested DPU on MSM8998, but I think it was limited to video / HDMI
> usecases.

I think we poked at both, back in the day (tm) and DPU worked on msm8998-
sony-maple (sharp,ls055d1sx04 cmd mode panel) with the funny CMD mode hack
(due to a register field not existing on <845?)

https://github.com/SoMainline/linux/commit/14e0517e2fd5eee116a32db624b09856c60fa022

FYI panel wiring:

https://github.com/SoMainline/linux/commit/88f276e81cea0f7496d3f92cd731f27615cfa703

+Marijn may know more

Konrad