[PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a

[PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a

[Johan Jonker via B4 Relay]

From: Hüseyin BIYIK <boogiepop@gmx.com>

RK3066a CPU1 fails to come online. Fix by using
a similar mailbox construction as in use with
other Rockchip SoCs.

Signed-off-by: Hüseyin BIYIK <boogiepop@gmx.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
---
 arch/arm/mach-rockchip/platsmp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index f659d894bfae..d7d080c29f3c 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
 	if (ret < 0)
 		return ret;
 
-	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
+	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
+	    of_machine_is_compatible("rockchip,rk3066a")) {
 		/*
 		 * We communicate with the bootrom to active the cpus other
 		 * than cpu0, after a blob of initialize code, they will

---
base-commit: 2709dd5ae32f0828f386327c76bba9f39f63a1c6
change-id: 20260829-cpu-c518bde9b473

Best regards,
-- 
Johan Jonker <jbx6244@gmail.com>

Re: [PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a

[Heiko Stübner]

Am Samstag, 29. August 2026, 01:40:57 Mitteleuropäische Sommerzeit schrieb Johan Jonker via B4 Relay:
> From: Hüseyin BIYIK <boogiepop@gmx.com>
> 
> RK3066a CPU1 fails to come online. Fix by using
> a similar mailbox construction as in use with
> other Rockchip SoCs.

"RK3066 CPU1 fails to come online with recent kernels....[rest]" or so
and also please use the line length up a resonable length like around 70
to 75 characters.

Also, is it known, why that happens - i.e. what changed?

> Signed-off-by: Hüseyin BIYIK <boogiepop@gmx.com>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
>  arch/arm/mach-rockchip/platsmp.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
> index f659d894bfae..d7d080c29f3c 100644
> --- a/arch/arm/mach-rockchip/platsmp.c
> +++ b/arch/arm/mach-rockchip/platsmp.c
> @@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
>  	if (ret < 0)
>  		return ret;
>  
> -	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
> +	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
> +	    of_machine_is_compatible("rockchip,rk3066a")) {
>  		/*
>  		 * We communicate with the bootrom to active the cpus other
>  		 * than cpu0, after a blob of initialize code, they will

isn't now the only user of the old system the RK3188?

With both rk3066 and rk3188 from a similar time, I'd assume both could
be switch and thus the the now unused code removed?

I've never thought to look into that ... need to find my RK3188 board :-)


Heiko

Re: [PATCH] ARM: rockchip: smp: enable CPU1 for rk3066a

[Johan Jonker]

Hi,

On 8/29/26 23:59, Heiko Stübner wrote:
> Am Samstag, 29. August 2026, 01:40:57 Mitteleuropäische Sommerzeit schrieb Johan Jonker via B4 Relay:
>> From: Hüseyin BIYIK <boogiepop@gmx.com>
>>
>> RK3066a CPU1 fails to come online. Fix by using
>> a similar mailbox construction as in use with
>> other Rockchip SoCs.
> 

> "RK3066 CPU1 fails to come online with recent kernels....[rest]" or so

Not recent..

> and also please use the line length up a resonable length like around 70> to 75 characters.
> 
> Also, is it known, why that happens - i.e. what changed?


What loader chain did you use then?

This guessing!!!:
From TRM: RK PX2/rk3066a supports to boot from internal bootrom or embedded SRAM
Currently rk3066 U-boot doesn't remap, so we end up in ROM code waiting for deadbeaf:

void main(void)
{
        deadbeaf = 1;
        if ( !(__mrc(15, 0, 0, 0, 5) & 0xF) )
        {
                __set_CPSR(0xD2u);
                __set_CPSR(0xD3u);
                DELAY_write(24);
                CRU_CLKSEL();
                DELAY(10000);
                MAIN_LOOP1x4();
                DNL_LOOP();
                while ( 1 )
                        ;
        }
        __set_CPSR(0xD3u);
        while ( deadbeaf != 0xDEADBEAF )
                __wfe();
        secondary_startup();
}

Can't put a precise time tag on it since when.
Let us lead by what current available open source loaders solutions can do.
Please advise here.
How far does a fixes tag have to go back?

> 
>> Signed-off-by: Hüseyin BIYIK <boogiepop@gmx.com>
>> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
>> ---
>>  arch/arm/mach-rockchip/platsmp.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
>> index f659d894bfae..d7d080c29f3c 100644
>> --- a/arch/arm/mach-rockchip/platsmp.c
>> +++ b/arch/arm/mach-rockchip/platsmp.c
>> @@ -133,7 +133,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
>>  	if (ret < 0)
>>  		return ret;
>>  
>> -	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
>> +	if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9 ||
>> +	    of_machine_is_compatible("rockchip,rk3066a")) {
>>  		/*
>>  		 * We communicate with the bootrom to active the cpus other
>>  		 * than cpu0, after a blob of initialize code, they will
> 

> isn't now the only user of the old system the RK3188?
> 
> With both rk3066 and rk3188 from a similar time, I'd assume both could
> be switch and thus the the now unused code removed?
> 

> I've never thought to look into that ... need to find my RK3188 board :-)

Let me know what rk3188 U-boot and Kernel end up with how many CPUs, so we can remove the "if" condition altogether.

Johan

> 
> 
> Heiko
> 
> 
===========

https://github.com/armhoff/u-boot-rockchip/blob/u-boot-rk3066-sdcard/board/rockchip/common/platform/rk30/romloader.s#L110
https://github.com/paweljarosz82/u-boot-rk3066/blob/wip/rk3066-8/arch/arm/mach-rockchip/rk3066-board.c#L32