* [PATCH v3 0/2] Introduce support for Monaco Evaluation Kit
@ 2025-08-26 18:15 Umang Chheda
2025-08-26 18:15 ` [PATCH v3 1/2] dt-bindings: arm: qcom: Add Monaco EVK support Umang Chheda
2025-08-26 18:15 ` [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support Umang Chheda
0 siblings, 2 replies; 14+ messages in thread
From: Umang Chheda @ 2025-08-26 18:15 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Richard Cochran
Cc: linux-arm-msm, devicetree, linux-kernel, Umang Chheda
Add support for Qualcomm's Monaco Evaluation Kit (EVK) without
safety monitoring feature of Safety Island(SAIL) subsystem.
This board is based on Qualcomm's QCS8300 SoC.
Monaco EVK board is a single board computer (SBC) that supports various
industrial applications, including factory automation, industrial
robots, drones, edge AI boxes, machine vision, autonomous mobile
robots (AMRs), and industrial gateways.
Dependency:
- Revert commit b5323835f050 ("OPP: Reorganize _opp_table_find_key()") to
avoid regression introduced in linux-next (20250825).
- The ethernet PHY QCA8081 depends on CONFIG_QCA808X_PHY, without
which ethernet will not work.
---
Changelog:
v3:
- Include changelog in proper format and make it more verbose [Krzysztof].
- Fix subject line of dt-bindings change [Krzysztof].
- Move the H/W peripheral information added in cover letter to commit text
of Board DT change [Krzysztof].
- Include 'qcs8300-pmics.dtsi' in the Board DT [Dmitry].
- Enable below peripherals as suggested by Dmitry and Konrad to include more
peripherals in this series itself :
- GPI (Generic Peripheral Interface) DMA controllers and QUPv3 controllers
for peripheral communication.
- I2C based devices like GPIO I/O expander and EEPROM.
- USB1 controller in device mode.
- Re-enable Remoteproc subsystems ADSP, CDSP & GPDSP as fix [3] is
merged.
- Qca8081 2.5G Ethernet PHY.
- Iris video decoder.
- Update the Board DT change commit text to reflect the above
newly added peripherals changes.
- v2-link: [2]
v2:
- Address Bjorn's comment to rename the board filename and
compatible to monaco-evk.
- Include the bindings for monaco-evk with the existing qcs8300-soc
itself instead of adding a new SoC binding.
- Drop remoteproc support as qcom remoteproc driver is currently
broken in upstream [3]
- v1-link: [1]
[1] https://lore.kernel.org/all/20250623130420.3981916-1-umang.chheda@oss.qualcomm.com/
[2] https://lore.kernel.org/all/b376d130-2816-42b1-a8c1-1962ee0c2cd7@oss.qualcomm.com/
[3] https://lore.kernel.org/all/20250804-mdtloader-changes-v1-3-5e74629a2241@oss.qualcomm.com/
---
Umang Chheda (2):
dt-bindings: arm: qcom: Add Monaco EVK support
arm64: dts: qcom: Add Monaco EVK initial board support
.../devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm64/boot/dts/qcom/monaco-evk.dts | 490 ++++++++++++++++++
2 files changed, 491 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts
--
2.34.1
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH v3 1/2] dt-bindings: arm: qcom: Add Monaco EVK support 2025-08-26 18:15 [PATCH v3 0/2] Introduce support for Monaco Evaluation Kit Umang Chheda @ 2025-08-26 18:15 ` Umang Chheda 2025-08-29 7:57 ` Krzysztof Kozlowski 2025-08-26 18:15 ` [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support Umang Chheda 1 sibling, 1 reply; 14+ messages in thread From: Umang Chheda @ 2025-08-26 18:15 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran Cc: linux-arm-msm, devicetree, linux-kernel, Umang Chheda Introduce new bindings for the Monaco Evaluation Kit (EVK), an IoT board based on the QCS8300 SoC. Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> --- Documentation/devicetree/bindings/arm/qcom.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 55e5eb75af89..a4b125f83450 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -854,6 +854,7 @@ properties: - items: - enum: + - qcom,monaco-evk - qcom,qcs8300-ride - const: qcom,qcs8300 -- 2.34.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 1/2] dt-bindings: arm: qcom: Add Monaco EVK support 2025-08-26 18:15 ` [PATCH v3 1/2] dt-bindings: arm: qcom: Add Monaco EVK support Umang Chheda @ 2025-08-29 7:57 ` Krzysztof Kozlowski 0 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2025-08-29 7:57 UTC (permalink / raw) To: Umang Chheda Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel On Tue, Aug 26, 2025 at 11:45:05PM +0530, Umang Chheda wrote: > Introduce new bindings for the Monaco Evaluation Kit (EVK), > an IoT board based on the QCS8300 SoC. > > Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> > --- > Documentation/devicetree/bindings/arm/qcom.yaml | 1 + > 1 file changed, 1 insertion(+) Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-26 18:15 [PATCH v3 0/2] Introduce support for Monaco Evaluation Kit Umang Chheda 2025-08-26 18:15 ` [PATCH v3 1/2] dt-bindings: arm: qcom: Add Monaco EVK support Umang Chheda @ 2025-08-26 18:15 ` Umang Chheda 2025-08-27 1:42 ` Dmitry Baryshkov ` (2 more replies) 1 sibling, 3 replies; 14+ messages in thread From: Umang Chheda @ 2025-08-26 18:15 UTC (permalink / raw) To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran Cc: linux-arm-msm, devicetree, linux-kernel, Umang Chheda, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia, Swati Agarwal Add initial device tree support for Monaco EVK board, based on Qualcomm's QCS8300 SoC. Monaco EVK is single board supporting these peripherals: - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs, and eMMC. - Audio/Video, Camera & Display ports. - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. - PCIe ports. - USB & UART ports. On top of Monaco EVK board additional mezzanine boards can be stacked in future. Add support for the following components : - GPI (Generic Peripheral Interface) and QUPv3-0/1 controllers to facilitate DMA and peripheral communication. - TCA9534 I/O expander via I2C to provide 8 additional GPIO lines for extended I/O functionality. - USB1 controller in device mode to support USB peripheral operations. - Remoteproc subsystems for supported DSPs such as Audio DSP, Compute DSP and Generic DSP, along with their corresponding firmware. - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet and other consumers. - QCA8081 2.5G Ethernet PHY on port-0 and expose the Ethernet MAC address via nvmem for network configuration. It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. - Support for the Iris video decoder, including the required firmware, to enable video decoding capabilities. Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ 2 files changed, 464 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 94a84770b080..057a81ea04ed 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp449.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp453.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp454.dtb dtb-$(CONFIG_ARCH_QCOM) += lemans-evk.dtb +dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts new file mode 100644 index 000000000000..8d58e62f6c87 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts @@ -0,0 +1,463 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> + +#include "qcs8300.dtsi" +#include "qcs8300-pmics.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Monaco EVK"; + compatible = "qcom,monaco-evk", "qcom,qcs8300"; + + aliases { + ethernet0 = ðernet0; + i2c1 = &i2c1; + serial0 = &uart7; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&apps_rsc { + regulators-0 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vreg_l3a: ldo3 { + regulator-name = "vreg_l3a"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4a: ldo4 { + regulator-name = "vreg_l4a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l5a: ldo5 { + regulator-name = "vreg_l5a"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l6a: ldo6 { + regulator-name = "vreg_l6a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7a: ldo7 { + regulator-name = "vreg_l7a"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <912000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8a: ldo8 { + regulator-name = "vreg_l8a"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9a: ldo9 { + regulator-name = "vreg_l9a"; + regulator-min-microvolt = <2970000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + }; + + regulators-1 { + compatible = "qcom,pmm8654au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vreg_s5c: smps5 { + regulator-name = "vreg_s5c"; + regulator-min-microvolt = <1104000>; + regulator-max-microvolt = <1104000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l1c: ldo1 { + regulator-name = "vreg_l1c"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <512000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l2c: ldo2 { + regulator-name = "vreg_l2c"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <904000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l4c: ldo4 { + regulator-name = "vreg_l4c"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l7c: ldo7 { + regulator-name = "vreg_l7c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l8c: ldo8 { + regulator-name = "vreg_l8c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + + vreg_l9c: ldo9 { + regulator-name = "vreg_l9c"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-allow-set-load; + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM + RPMH_REGULATOR_MODE_HPM>; + }; + }; +}; + +ðernet0 { + phy-mode = "2500base-x"; + phy-handle = <&hsgmii_phy0>; + + pinctrl-0 = <ðernet0_default>; + pinctrl-names = "default"; + + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,ps-speed = <1000>; + nvmem-cells = <&mac_addr0>; + nvmem-cell-names = "mac-address"; + + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + hsgmii_phy0: ethernet-phy@1c { + compatible = "ethernet-phy-id004d.d101"; + reg = <0x1c>; + reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <4>; + snps,rx-sched-sp; + + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,route-up; + snps,priority = <0x1>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,route-ptp; + }; + + queue2 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x2>; + snps,route-avcp; + }; + + queue3 { + snps,avb-algorithm; + snps,map-to-dma-channel = <0x3>; + snps,priority = <0xc>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <4>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + + queue3 { + snps,avb-algorithm; + snps,send_slope = <0x1000>; + snps,idle_slope = <0x1000>; + snps,high_credit = <0x3e800>; + snps,low_credit = <0xffc18000>; + }; + }; +}; + +&gpi_dma0 { + status = "okay"; +}; + +&gpi_dma1 { + status = "okay"; +}; + +&i2c1 { + pinctrl-0 = <&qup_i2c1_default>; + pinctrl-names = "default"; + + status = "okay"; + + eeprom0: eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + pagesize = <64>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + mac_addr0: mac-addr@0 { + reg = <0x0 0x6>; + }; + }; + }; +}; + +&i2c15 { + pinctrl-0 = <&qup_i2c15_default>; + pinctrl-names = "default"; + + status = "okay"; + + expander0: pca953x@38 { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x38>; + }; + + expander1: pca953x@39 { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x39>; + }; + + expander2: pca953x@3a { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3a>; + }; + + expander3: pca953x@3b { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3b>; + }; + + expander4: pca953x@3c { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3c>; + }; + + expander5: pca953x@3d { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3d>; + }; + + expander6: pca953x@3e { + compatible = "ti,tca9538"; + #gpio-cells = <2>; + gpio-controller; + reg = <0x3e>; + }; +}; + +&iris { + status = "okay"; +}; + +&qupv3_id_0 { + status = "okay"; +}; + +&qupv3_id_1 { + status = "okay"; +}; + +&remoteproc_adsp { + firmware-name = "qcom/qcs8300/adsp.mbn"; + + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/qcs8300/cdsp0.mbn"; + + status = "okay"; +}; + +&remoteproc_gpdsp { + firmware-name = "qcom/qcs8300/gpdsp0.mbn"; + + status = "okay"; +}; + +&serdes0 { + phy-supply = <&vreg_l4a>; + + status = "okay"; +}; + +&tlmm { + ethernet0_default: ethernet0-default-state { + ethernet0_mdc: ethernet0-mdc-pins { + pins = "gpio5"; + function = "emac0_mdc"; + drive-strength = <16>; + bias-pull-up; + }; + + ethernet0_mdio: ethernet0-mdio-pins { + pins = "gpio6"; + function = "emac0_mdio"; + drive-strength = <16>; + bias-pull-up; + }; + }; + + qup_i2c1_default: qup-i2c1-state { + pins = "gpio19", "gpio20"; + function = "qup0_se1"; + drive-strength = <2>; + bias-pull-up; + }; + + qup_i2c15_default: qup-i2c15-state { + pins = "gpio91", "gpio92"; + function = "qup1_se7"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&uart7 { + status = "okay"; +}; + +&ufs_mem_hc { + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; + vcc-supply = <&vreg_l8a>; + vcc-max-microamp = <1100000>; + vccq-supply = <&vreg_l4c>; + vccq-max-microamp = <1200000>; + + status = "okay"; +}; + +&ufs_mem_phy { + vdda-phy-supply = <&vreg_l4a>; + vdda-pll-supply = <&vreg_l5a>; + + status = "okay"; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l7a>; + vdda18-supply = <&vreg_l7c>; + vdda33-supply = <&vreg_l9a>; + + status = "okay"; +}; + +&usb_qmpphy { + vdda-phy-supply = <&vreg_l7a>; + vdda-pll-supply = <&vreg_l5a>; + + status = "okay"; +}; -- 2.34.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-26 18:15 ` [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support Umang Chheda @ 2025-08-27 1:42 ` Dmitry Baryshkov 2025-09-03 10:05 ` Vikash Garodia 2025-09-05 13:24 ` Swati Agarwal 2025-08-27 17:58 ` Bjorn Andersson 2025-08-29 7:59 ` Krzysztof Kozlowski 2 siblings, 2 replies; 14+ messages in thread From: Dmitry Baryshkov @ 2025-08-27 1:42 UTC (permalink / raw) To: Umang Chheda Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia, Swati Agarwal On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: > Add initial device tree support for Monaco EVK board, based on > Qualcomm's QCS8300 SoC. > > Monaco EVK is single board supporting these peripherals: > - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs, > and eMMC. > - Audio/Video, Camera & Display ports. > - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. > - PCIe ports. > - USB & UART ports. > > On top of Monaco EVK board additional mezzanine boards can be > stacked in future. > > Add support for the following components : > - GPI (Generic Peripheral Interface) and QUPv3-0/1 > controllers to facilitate DMA and peripheral communication. > - TCA9534 I/O expander via I2C to provide 8 additional GPIO > lines for extended I/O functionality. > - USB1 controller in device mode to support USB peripheral > operations. Is it actually peripheral-only? > - Remoteproc subsystems for supported DSPs such as Audio DSP, > Compute DSP and Generic DSP, along with their corresponding > firmware. > - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet > and other consumers. > - QCA8081 2.5G Ethernet PHY on port-0 and expose the > Ethernet MAC address via nvmem for network configuration. > It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. > - Support for the Iris video decoder, including the required > firmware, to enable video decoding capabilities. I don't see firmware being declared here. > > Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> > Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> > Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> > Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> > Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ > 2 files changed, 464 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts > -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-27 1:42 ` Dmitry Baryshkov @ 2025-09-03 10:05 ` Vikash Garodia 2025-09-03 11:03 ` Dmitry Baryshkov 2025-09-05 13:24 ` Swati Agarwal 1 sibling, 1 reply; 14+ messages in thread From: Vikash Garodia @ 2025-09-03 10:05 UTC (permalink / raw) To: Dmitry Baryshkov, Umang Chheda Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Swati Agarwal On 8/27/2025 7:12 AM, Dmitry Baryshkov wrote: > On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: >> Add initial device tree support for Monaco EVK board, based on >> Qualcomm's QCS8300 SoC. >> >> Monaco EVK is single board supporting these peripherals: >> - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs, >> and eMMC. >> - Audio/Video, Camera & Display ports. >> - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. >> - PCIe ports. >> - USB & UART ports. >> >> On top of Monaco EVK board additional mezzanine boards can be >> stacked in future. >> >> Add support for the following components : >> - GPI (Generic Peripheral Interface) and QUPv3-0/1 >> controllers to facilitate DMA and peripheral communication. >> - TCA9534 I/O expander via I2C to provide 8 additional GPIO >> lines for extended I/O functionality. >> - USB1 controller in device mode to support USB peripheral >> operations. > > Is it actually peripheral-only? > >> - Remoteproc subsystems for supported DSPs such as Audio DSP, >> Compute DSP and Generic DSP, along with their corresponding >> firmware. >> - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet >> and other consumers. >> - QCA8081 2.5G Ethernet PHY on port-0 and expose the >> Ethernet MAC address via nvmem for network configuration. >> It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. >> - Support for the Iris video decoder, including the required >> firmware, to enable video decoding capabilities. > > I don't see firmware being declared here. It would pick the default firmware from driver monaco platform data. > >> >> Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> >> Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> >> Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> >> Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> >> Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> >> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> >> Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> >> Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> >> Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> >> Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> >> Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> >> Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> >> Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> >> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> >> Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> >> --- >> arch/arm64/boot/dts/qcom/Makefile | 1 + >> arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ >> 2 files changed, 464 insertions(+) >> create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts >> > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-09-03 10:05 ` Vikash Garodia @ 2025-09-03 11:03 ` Dmitry Baryshkov 2025-09-03 11:07 ` Vikash Garodia 0 siblings, 1 reply; 14+ messages in thread From: Dmitry Baryshkov @ 2025-09-03 11:03 UTC (permalink / raw) To: Vikash Garodia Cc: Umang Chheda, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Swati Agarwal On Wed, Sep 03, 2025 at 03:35:54PM +0530, Vikash Garodia wrote: > > On 8/27/2025 7:12 AM, Dmitry Baryshkov wrote: > > On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: > >> Add initial device tree support for Monaco EVK board, based on > >> Qualcomm's QCS8300 SoC. > >> > >> Monaco EVK is single board supporting these peripherals: > >> - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs, > >> and eMMC. > >> - Audio/Video, Camera & Display ports. > >> - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. > >> - PCIe ports. > >> - USB & UART ports. > >> > >> On top of Monaco EVK board additional mezzanine boards can be > >> stacked in future. > >> > >> Add support for the following components : > >> - GPI (Generic Peripheral Interface) and QUPv3-0/1 > >> controllers to facilitate DMA and peripheral communication. > >> - TCA9534 I/O expander via I2C to provide 8 additional GPIO > >> lines for extended I/O functionality. > >> - USB1 controller in device mode to support USB peripheral > >> operations. > > > > Is it actually peripheral-only? > > > >> - Remoteproc subsystems for supported DSPs such as Audio DSP, > >> Compute DSP and Generic DSP, along with their corresponding > >> firmware. > >> - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet > >> and other consumers. > >> - QCA8081 2.5G Ethernet PHY on port-0 and expose the > >> Ethernet MAC address via nvmem for network configuration. > >> It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. > >> - Support for the Iris video decoder, including the required > >> firmware, to enable video decoding capabilities. > > > > I don't see firmware being declared here. > > It would pick the default firmware from driver monaco platform data. Yes, but the commit message says something different. -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-09-03 11:03 ` Dmitry Baryshkov @ 2025-09-03 11:07 ` Vikash Garodia 0 siblings, 0 replies; 14+ messages in thread From: Vikash Garodia @ 2025-09-03 11:07 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Umang Chheda, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Swati Agarwal On 9/3/2025 4:33 PM, Dmitry Baryshkov wrote: >>>> - Support for the Iris video decoder, including the required >>>> firmware, to enable video decoding capabilities. >>> I don't see firmware being declared here. >> It would pick the default firmware from driver monaco platform data. > Yes, but the commit message says something different. You are right. Should be updated in the next revision. Regards, Vikash ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-27 1:42 ` Dmitry Baryshkov 2025-09-03 10:05 ` Vikash Garodia @ 2025-09-05 13:24 ` Swati Agarwal 2025-09-05 13:41 ` Dmitry Baryshkov 1 sibling, 1 reply; 14+ messages in thread From: Swati Agarwal @ 2025-09-05 13:24 UTC (permalink / raw) To: Dmitry Baryshkov Cc: Umang Chheda, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia On Wed, Aug 27, 2025 at 7:13 AM Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> wrote: > > On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: > > Add initial device tree support for Monaco EVK board, based on > > Qualcomm's QCS8300 SoC. > > > > Monaco EVK is single board supporting these peripherals: > > - Storage: 1 в 128 GB UFS, micro-SD card, EEPROMs for MACs, > > and eMMC. > > - Audio/Video, Camera & Display ports. > > - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. > > - PCIe ports. > > - USB & UART ports. > > > > On top of Monaco EVK board additional mezzanine boards can be > > stacked in future. > > > > Add support for the following components : > > - GPI (Generic Peripheral Interface) and QUPv3-0/1 > > controllers to facilitate DMA and peripheral communication. > > - TCA9534 I/O expander via I2C to provide 8 additional GPIO > > lines for extended I/O functionality. > > - USB1 controller in device mode to support USB peripheral > > operations. > > Is it actually peripheral-only? Hi Dmitry, HW supports OTG mode as well on the USB0 port but for enabling OTG mode , it requires two things, one is role switch support and another is VBUS supply on/off support. Both will be taken care of by Type-C manager HD3SS3220. Currently, VBUS enablement support is not present in the driver. Once that support is added, I will add OTG support for the USB0 port, until then we would like to keep it in peripheral mode for ADB support. This is the same change which was discussed for lemans-evk [1] applies for monaco-evk as well. [1] https://lore.kernel.org/linux-arm-msm/d6816cc6-c69e-4746-932e-8b030ca17245@oss.qualcomm.com/ Regards, Swati > > > - Remoteproc subsystems for supported DSPs such as Audio DSP, > > Compute DSP and Generic DSP, along with their corresponding > > firmware. > > - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet > > and other consumers. > > - QCA8081 2.5G Ethernet PHY on port-0 and expose the > > Ethernet MAC address via nvmem for network configuration. > > It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. > > - Support for the Iris video decoder, including the required > > firmware, to enable video decoding capabilities. > > I don't see firmware being declared here. > > > > > Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > > Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > > Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > > Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > > Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > > Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > > Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > > Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > > Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> > > Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> > > Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> > > Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> > > Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> > > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > > Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > > Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > > Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> > > --- > > arch/arm64/boot/dts/qcom/Makefile | 1 + > > arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ > > 2 files changed, 464 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts > > > > -- > With best wishes > Dmitry ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-09-05 13:24 ` Swati Agarwal @ 2025-09-05 13:41 ` Dmitry Baryshkov 0 siblings, 0 replies; 14+ messages in thread From: Dmitry Baryshkov @ 2025-09-05 13:41 UTC (permalink / raw) To: Swati Agarwal Cc: Umang Chheda, Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia On Fri, Sep 05, 2025 at 06:54:25PM +0530, Swati Agarwal wrote: > On Wed, Aug 27, 2025 at 7:13 AM Dmitry Baryshkov > <dmitry.baryshkov@oss.qualcomm.com> wrote: > > > > On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: > > > Add initial device tree support for Monaco EVK board, based on > > > Qualcomm's QCS8300 SoC. > > > > > > Monaco EVK is single board supporting these peripherals: > > > - Storage: 1 в 128 GB UFS, micro-SD card, EEPROMs for MACs, > > > and eMMC. > > > - Audio/Video, Camera & Display ports. > > > - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. > > > - PCIe ports. > > > - USB & UART ports. > > > > > > On top of Monaco EVK board additional mezzanine boards can be > > > stacked in future. > > > > > > Add support for the following components : > > > - GPI (Generic Peripheral Interface) and QUPv3-0/1 > > > controllers to facilitate DMA and peripheral communication. > > > - TCA9534 I/O expander via I2C to provide 8 additional GPIO > > > lines for extended I/O functionality. > > > - USB1 controller in device mode to support USB peripheral > > > operations. > > > > Is it actually peripheral-only? > Hi Dmitry, > > HW supports OTG mode as well on the USB0 port but for enabling OTG > mode , it requires two things, one is role switch support and another > is VBUS supply on/off support. Both will be taken care of by Type-C > manager HD3SS3220. Currently, VBUS enablement support is not present > in the driver. Once that support is added, I will add OTG support for > the USB0 port, until then we would like to keep it in peripheral mode > for ADB support. Add comment to the DT file, please. > > This is the same change which was discussed for lemans-evk [1] applies > for monaco-evk as well. > > [1] https://lore.kernel.org/linux-arm-msm/d6816cc6-c69e-4746-932e-8b030ca17245@oss.qualcomm.com/ > > Regards, > Swati > > > > > - Remoteproc subsystems for supported DSPs such as Audio DSP, > > > Compute DSP and Generic DSP, along with their corresponding > > > firmware. > > > - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet > > > and other consumers. > > > - QCA8081 2.5G Ethernet PHY on port-0 and expose the > > > Ethernet MAC address via nvmem for network configuration. > > > It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. > > > - Support for the Iris video decoder, including the required > > > firmware, to enable video decoding capabilities. > > > > I don't see firmware being declared here. > > > > > > > > Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > > > Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > > > Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > > > Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > > > Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > > > Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > > > Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > > > Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > > > Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> > > > Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> > > > Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> > > > Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> > > > Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> > > > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > > > Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > > > Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > > > Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> > > > --- > > > arch/arm64/boot/dts/qcom/Makefile | 1 + > > > arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ > > > 2 files changed, 464 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts > > > > > > > -- > > With best wishes > > Dmitry -- With best wishes Dmitry ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-26 18:15 ` [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support Umang Chheda 2025-08-27 1:42 ` Dmitry Baryshkov @ 2025-08-27 17:58 ` Bjorn Andersson 2025-09-02 12:42 ` Umang Chheda 2025-08-29 7:59 ` Krzysztof Kozlowski 2 siblings, 1 reply; 14+ messages in thread From: Bjorn Andersson @ 2025-08-27 17:58 UTC (permalink / raw) To: Umang Chheda Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia, Swati Agarwal On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: Please add "qcs8300: " to the prefix and drop the words "initial" and "support" from subject. > Add initial device tree support for Monaco EVK board, based on > Qualcomm's QCS8300 SoC. Drop this sentence and embed the useful information in the next paragraph, which introduces us to the purpose of the patch. "Monaco EVK is a single board computer, based on the Qualcomm QCS8300 SoC, with the following features:" > > Monaco EVK is single board supporting these peripherals: > - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs, > and eMMC. > - Audio/Video, Camera & Display ports. > - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. > - PCIe ports. > - USB & UART ports. > > On top of Monaco EVK board additional mezzanine boards can be > stacked in future. > > Add support for the following components : > - GPI (Generic Peripheral Interface) and QUPv3-0/1 > controllers to facilitate DMA and peripheral communication. > - TCA9534 I/O expander via I2C to provide 8 additional GPIO > lines for extended I/O functionality. > - USB1 controller in device mode to support USB peripheral > operations. > - Remoteproc subsystems for supported DSPs such as Audio DSP, > Compute DSP and Generic DSP, along with their corresponding > firmware. > - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet > and other consumers. > - QCA8081 2.5G Ethernet PHY on port-0 and expose the > Ethernet MAC address via nvmem for network configuration. > It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. > - Support for the Iris video decoder, including the required > firmware, to enable video decoding capabilities. > > Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> > Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> > Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> > Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> > Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> > Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> > Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> > Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> > Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> > Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> > Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> > Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ > 2 files changed, 464 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 94a84770b080..057a81ea04ed 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp449.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp453.dtb > dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp454.dtb > dtb-$(CONFIG_ARCH_QCOM) += lemans-evk.dtb > +dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb > dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb > diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts > new file mode 100644 > index 000000000000..8d58e62f6c87 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts > @@ -0,0 +1,463 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. This is the wrong copyright statement. > + */ > + > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> > + > +#include "qcs8300.dtsi" > +#include "qcs8300-pmics.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. Monaco EVK"; > + compatible = "qcom,monaco-evk", "qcom,qcs8300"; > + > + aliases { > + ethernet0 = ðernet0; > + i2c1 = &i2c1; > + serial0 = &uart7; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > +}; > + > +&apps_rsc { > + regulators-0 { > + compatible = "qcom,pmm8654au-rpmh-regulators"; > + qcom,pmic-id = "a"; > + > + vreg_l3a: ldo3 { > + regulator-name = "vreg_l3a"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; Are you sure that all these should have LPM and HPM as allowed modes? I would have preferred HPM-only and then selectively enable LPM, to avoid issues when LPM is entered. Such as what happened in fba47ba8c8a8 ("arm64: dts: qcom: qcs615: Set LDO12A regulator to HPM to avoid boot hang") Regards, Bjorn > + }; > + > + vreg_l4a: ldo4 { > + regulator-name = "vreg_l4a"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l5a: ldo5 { > + regulator-name = "vreg_l5a"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l6a: ldo6 { > + regulator-name = "vreg_l6a"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7a: ldo7 { > + regulator-name = "vreg_l7a"; > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <912000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8a: ldo8 { > + regulator-name = "vreg_l8a"; > + regulator-min-microvolt = <2504000>; > + regulator-max-microvolt = <2960000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9a: ldo9 { > + regulator-name = "vreg_l9a"; > + regulator-min-microvolt = <2970000>; > + regulator-max-microvolt = <3072000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > + > + regulators-1 { > + compatible = "qcom,pmm8654au-rpmh-regulators"; > + qcom,pmic-id = "c"; > + > + vreg_s5c: smps5 { > + regulator-name = "vreg_s5c"; > + regulator-min-microvolt = <1104000>; > + regulator-max-microvolt = <1104000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l1c: ldo1 { > + regulator-name = "vreg_l1c"; > + regulator-min-microvolt = <300000>; > + regulator-max-microvolt = <512000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l2c: ldo2 { > + regulator-name = "vreg_l2c"; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <904000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l4c: ldo4 { > + regulator-name = "vreg_l4c"; > + regulator-min-microvolt = <1200000>; > + regulator-max-microvolt = <1200000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l7c: ldo7 { > + regulator-name = "vreg_l7c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l8c: ldo8 { > + regulator-name = "vreg_l8c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + > + vreg_l9c: ldo9 { > + regulator-name = "vreg_l9c"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; > + regulator-allow-set-load; > + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM > + RPMH_REGULATOR_MODE_HPM>; > + }; > + }; > +}; > + > +ðernet0 { > + phy-mode = "2500base-x"; > + phy-handle = <&hsgmii_phy0>; > + > + pinctrl-0 = <ðernet0_default>; > + pinctrl-names = "default"; > + > + snps,mtl-rx-config = <&mtl_rx_setup>; > + snps,mtl-tx-config = <&mtl_tx_setup>; > + snps,ps-speed = <1000>; > + nvmem-cells = <&mac_addr0>; > + nvmem-cell-names = "mac-address"; > + > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + hsgmii_phy0: ethernet-phy@1c { > + compatible = "ethernet-phy-id004d.d101"; > + reg = <0x1c>; > + reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + }; > + > + mtl_rx_setup: rx-queues-config { > + snps,rx-queues-to-use = <4>; > + snps,rx-sched-sp; > + > + queue0 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x0>; > + snps,route-up; > + snps,priority = <0x1>; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + snps,map-to-dma-channel = <0x1>; > + snps,route-ptp; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x2>; > + snps,route-avcp; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,map-to-dma-channel = <0x3>; > + snps,priority = <0xc>; > + }; > + }; > + > + mtl_tx_setup: tx-queues-config { > + snps,tx-queues-to-use = <4>; > + > + queue0 { > + snps,dcb-algorithm; > + }; > + > + queue1 { > + snps,dcb-algorithm; > + }; > + > + queue2 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + > + queue3 { > + snps,avb-algorithm; > + snps,send_slope = <0x1000>; > + snps,idle_slope = <0x1000>; > + snps,high_credit = <0x3e800>; > + snps,low_credit = <0xffc18000>; > + }; > + }; > +}; > + > +&gpi_dma0 { > + status = "okay"; > +}; > + > +&gpi_dma1 { > + status = "okay"; > +}; > + > +&i2c1 { > + pinctrl-0 = <&qup_i2c1_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > + > + eeprom0: eeprom@50 { > + compatible = "atmel,24c256"; > + reg = <0x50>; > + pagesize = <64>; > + > + nvmem-layout { > + compatible = "fixed-layout"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + mac_addr0: mac-addr@0 { > + reg = <0x0 0x6>; > + }; > + }; > + }; > +}; > + > +&i2c15 { > + pinctrl-0 = <&qup_i2c15_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > + > + expander0: pca953x@38 { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x38>; > + }; > + > + expander1: pca953x@39 { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x39>; > + }; > + > + expander2: pca953x@3a { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x3a>; > + }; > + > + expander3: pca953x@3b { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x3b>; > + }; > + > + expander4: pca953x@3c { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x3c>; > + }; > + > + expander5: pca953x@3d { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x3d>; > + }; > + > + expander6: pca953x@3e { > + compatible = "ti,tca9538"; > + #gpio-cells = <2>; > + gpio-controller; > + reg = <0x3e>; > + }; > +}; > + > +&iris { > + status = "okay"; > +}; > + > +&qupv3_id_0 { > + status = "okay"; > +}; > + > +&qupv3_id_1 { > + status = "okay"; > +}; > + > +&remoteproc_adsp { > + firmware-name = "qcom/qcs8300/adsp.mbn"; > + > + status = "okay"; > +}; > + > +&remoteproc_cdsp { > + firmware-name = "qcom/qcs8300/cdsp0.mbn"; > + > + status = "okay"; > +}; > + > +&remoteproc_gpdsp { > + firmware-name = "qcom/qcs8300/gpdsp0.mbn"; > + > + status = "okay"; > +}; > + > +&serdes0 { > + phy-supply = <&vreg_l4a>; > + > + status = "okay"; > +}; > + > +&tlmm { > + ethernet0_default: ethernet0-default-state { > + ethernet0_mdc: ethernet0-mdc-pins { > + pins = "gpio5"; > + function = "emac0_mdc"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + > + ethernet0_mdio: ethernet0-mdio-pins { > + pins = "gpio6"; > + function = "emac0_mdio"; > + drive-strength = <16>; > + bias-pull-up; > + }; > + }; > + > + qup_i2c1_default: qup-i2c1-state { > + pins = "gpio19", "gpio20"; > + function = "qup0_se1"; > + drive-strength = <2>; > + bias-pull-up; > + }; > + > + qup_i2c15_default: qup-i2c15-state { > + pins = "gpio91", "gpio92"; > + function = "qup1_se7"; > + drive-strength = <2>; > + bias-pull-up; > + }; > +}; > + > +&uart7 { > + status = "okay"; > +}; > + > +&ufs_mem_hc { > + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; > + vcc-supply = <&vreg_l8a>; > + vcc-max-microamp = <1100000>; > + vccq-supply = <&vreg_l4c>; > + vccq-max-microamp = <1200000>; > + > + status = "okay"; > +}; > + > +&ufs_mem_phy { > + vdda-phy-supply = <&vreg_l4a>; > + vdda-pll-supply = <&vreg_l5a>; > + > + status = "okay"; > +}; > + > +&usb_1 { > + status = "okay"; > +}; > + > +&usb_1_dwc3 { > + dr_mode = "peripheral"; > +}; > + > +&usb_1_hsphy { > + vdda-pll-supply = <&vreg_l7a>; > + vdda18-supply = <&vreg_l7c>; > + vdda33-supply = <&vreg_l9a>; > + > + status = "okay"; > +}; > + > +&usb_qmpphy { > + vdda-phy-supply = <&vreg_l7a>; > + vdda-pll-supply = <&vreg_l5a>; > + > + status = "okay"; > +}; > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-27 17:58 ` Bjorn Andersson @ 2025-09-02 12:42 ` Umang Chheda 0 siblings, 0 replies; 14+ messages in thread From: Umang Chheda @ 2025-09-02 12:42 UTC (permalink / raw) To: Bjorn Andersson Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia, Swati Agarwal Hi Bjorn, On 8/27/2025 11:28 PM, Bjorn Andersson wrote: > On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: > > Please add "qcs8300: " to the prefix and drop the words "initial" and > "support" from subject. > >> Add initial device tree support for Monaco EVK board, based on >> Qualcomm's QCS8300 SoC. > > Drop this sentence and embed the useful information in the next > paragraph, which introduces us to the purpose of the patch. > > "Monaco EVK is a single board computer, based on the Qualcomm QCS8300 > SoC, with the following features:" >> Ack. >> Monaco EVK is single board supporting these peripherals: >> - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs, >> and eMMC. >> - Audio/Video, Camera & Display ports. >> - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD. >> - PCIe ports. >> - USB & UART ports. >> >> On top of Monaco EVK board additional mezzanine boards can be >> stacked in future. >> >> Add support for the following components : >> - GPI (Generic Peripheral Interface) and QUPv3-0/1 >> controllers to facilitate DMA and peripheral communication. >> - TCA9534 I/O expander via I2C to provide 8 additional GPIO >> lines for extended I/O functionality. >> - USB1 controller in device mode to support USB peripheral >> operations. >> - Remoteproc subsystems for supported DSPs such as Audio DSP, >> Compute DSP and Generic DSP, along with their corresponding >> firmware. >> - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet >> and other consumers. >> - QCA8081 2.5G Ethernet PHY on port-0 and expose the >> Ethernet MAC address via nvmem for network configuration. >> It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY. >> - Support for the Iris video decoder, including the required >> firmware, to enable video decoding capabilities. >> >> Co-developed-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> >> Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> >> Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> >> Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> >> Co-developed-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> >> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> >> Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> >> Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com> >> Co-developed-by: Arun Khannna <quic_arkhanna@quicinc.com> >> Signed-off-by: Arun Khannna <quic_arkhanna@quicinc.com> >> Co-developed-by: Monish Chunara <quic_mchunara@quicinc.com> >> Signed-off-by: Monish Chunara <quic_mchunara@quicinc.com> >> Co-developed-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> >> Co-developed-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> >> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> >> Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> >> --- >> arch/arm64/boot/dts/qcom/Makefile | 1 + >> arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++ >> 2 files changed, 464 insertions(+) >> create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts >> >> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile >> index 94a84770b080..057a81ea04ed 100644 >> --- a/arch/arm64/boot/dts/qcom/Makefile >> +++ b/arch/arm64/boot/dts/qcom/Makefile >> @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp449.dtb >> dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp453.dtb >> dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp454.dtb >> dtb-$(CONFIG_ARCH_QCOM) += lemans-evk.dtb >> +dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb >> dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb >> dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb >> dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb >> diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts >> new file mode 100644 >> index 000000000000..8d58e62f6c87 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts >> @@ -0,0 +1,463 @@ >> +// SPDX-License-Identifier: BSD-3-Clause >> +/* >> + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. > > This is the wrong copyright statement. Ack, will update this in next patch. > >> + */ >> + >> +/dts-v1/; >> + >> +#include <dt-bindings/gpio/gpio.h> >> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h> >> + >> +#include "qcs8300.dtsi" >> +#include "qcs8300-pmics.dtsi" >> + >> +/ { >> + model = "Qualcomm Technologies, Inc. Monaco EVK"; >> + compatible = "qcom,monaco-evk", "qcom,qcs8300"; >> + >> + aliases { >> + ethernet0 = ðernet0; >> + i2c1 = &i2c1; >> + serial0 = &uart7; >> + }; >> + >> + chosen { >> + stdout-path = "serial0:115200n8"; >> + }; >> +}; >> + >> +&apps_rsc { >> + regulators-0 { >> + compatible = "qcom,pmm8654au-rpmh-regulators"; >> + qcom,pmic-id = "a"; >> + >> + vreg_l3a: ldo3 { >> + regulator-name = "vreg_l3a"; >> + regulator-min-microvolt = <1200000>; >> + regulator-max-microvolt = <1200000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; > > Are you sure that all these should have LPM and HPM as allowed modes? I > would have preferred HPM-only and then selectively enable LPM, to avoid > issues when LPM is entered. > > Such as what happened in fba47ba8c8a8 ("arm64: dts: qcom: qcs615: Set > LDO12A regulator to HPM to avoid boot hang") > Ack, we will enable only HPM mode for now, and enable LPM modes selectively later after confirming LPM voting support from all the clients. > Regards, > Bjorn > Thanks, Umang > >> + }; >> + >> + vreg_l4a: ldo4 { >> + regulator-name = "vreg_l4a"; >> + regulator-min-microvolt = <880000>; >> + regulator-max-microvolt = <912000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l5a: ldo5 { >> + regulator-name = "vreg_l5a"; >> + regulator-min-microvolt = <1200000>; >> + regulator-max-microvolt = <1200000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l6a: ldo6 { >> + regulator-name = "vreg_l6a"; >> + regulator-min-microvolt = <880000>; >> + regulator-max-microvolt = <912000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l7a: ldo7 { >> + regulator-name = "vreg_l7a"; >> + regulator-min-microvolt = <880000>; >> + regulator-max-microvolt = <912000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l8a: ldo8 { >> + regulator-name = "vreg_l8a"; >> + regulator-min-microvolt = <2504000>; >> + regulator-max-microvolt = <2960000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l9a: ldo9 { >> + regulator-name = "vreg_l9a"; >> + regulator-min-microvolt = <2970000>; >> + regulator-max-microvolt = <3072000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + }; >> + >> + regulators-1 { >> + compatible = "qcom,pmm8654au-rpmh-regulators"; >> + qcom,pmic-id = "c"; >> + >> + vreg_s5c: smps5 { >> + regulator-name = "vreg_s5c"; >> + regulator-min-microvolt = <1104000>; >> + regulator-max-microvolt = <1104000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l1c: ldo1 { >> + regulator-name = "vreg_l1c"; >> + regulator-min-microvolt = <300000>; >> + regulator-max-microvolt = <512000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l2c: ldo2 { >> + regulator-name = "vreg_l2c"; >> + regulator-min-microvolt = <900000>; >> + regulator-max-microvolt = <904000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l4c: ldo4 { >> + regulator-name = "vreg_l4c"; >> + regulator-min-microvolt = <1200000>; >> + regulator-max-microvolt = <1200000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l7c: ldo7 { >> + regulator-name = "vreg_l7c"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l8c: ldo8 { >> + regulator-name = "vreg_l8c"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + >> + vreg_l9c: ldo9 { >> + regulator-name = "vreg_l9c"; >> + regulator-min-microvolt = <1800000>; >> + regulator-max-microvolt = <1800000>; >> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; >> + regulator-allow-set-load; >> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM >> + RPMH_REGULATOR_MODE_HPM>; >> + }; >> + }; >> +}; >> + >> +ðernet0 { >> + phy-mode = "2500base-x"; >> + phy-handle = <&hsgmii_phy0>; >> + >> + pinctrl-0 = <ðernet0_default>; >> + pinctrl-names = "default"; >> + >> + snps,mtl-rx-config = <&mtl_rx_setup>; >> + snps,mtl-tx-config = <&mtl_tx_setup>; >> + snps,ps-speed = <1000>; >> + nvmem-cells = <&mac_addr0>; >> + nvmem-cell-names = "mac-address"; >> + >> + status = "okay"; >> + >> + mdio { >> + compatible = "snps,dwmac-mdio"; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + hsgmii_phy0: ethernet-phy@1c { >> + compatible = "ethernet-phy-id004d.d101"; >> + reg = <0x1c>; >> + reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; >> + reset-assert-us = <11000>; >> + reset-deassert-us = <70000>; >> + }; >> + }; >> + >> + mtl_rx_setup: rx-queues-config { >> + snps,rx-queues-to-use = <4>; >> + snps,rx-sched-sp; >> + >> + queue0 { >> + snps,dcb-algorithm; >> + snps,map-to-dma-channel = <0x0>; >> + snps,route-up; >> + snps,priority = <0x1>; >> + }; >> + >> + queue1 { >> + snps,dcb-algorithm; >> + snps,map-to-dma-channel = <0x1>; >> + snps,route-ptp; >> + }; >> + >> + queue2 { >> + snps,avb-algorithm; >> + snps,map-to-dma-channel = <0x2>; >> + snps,route-avcp; >> + }; >> + >> + queue3 { >> + snps,avb-algorithm; >> + snps,map-to-dma-channel = <0x3>; >> + snps,priority = <0xc>; >> + }; >> + }; >> + >> + mtl_tx_setup: tx-queues-config { >> + snps,tx-queues-to-use = <4>; >> + >> + queue0 { >> + snps,dcb-algorithm; >> + }; >> + >> + queue1 { >> + snps,dcb-algorithm; >> + }; >> + >> + queue2 { >> + snps,avb-algorithm; >> + snps,send_slope = <0x1000>; >> + snps,idle_slope = <0x1000>; >> + snps,high_credit = <0x3e800>; >> + snps,low_credit = <0xffc18000>; >> + }; >> + >> + queue3 { >> + snps,avb-algorithm; >> + snps,send_slope = <0x1000>; >> + snps,idle_slope = <0x1000>; >> + snps,high_credit = <0x3e800>; >> + snps,low_credit = <0xffc18000>; >> + }; >> + }; >> +}; >> + >> +&gpi_dma0 { >> + status = "okay"; >> +}; >> + >> +&gpi_dma1 { >> + status = "okay"; >> +}; >> + >> +&i2c1 { >> + pinctrl-0 = <&qup_i2c1_default>; >> + pinctrl-names = "default"; >> + >> + status = "okay"; >> + >> + eeprom0: eeprom@50 { >> + compatible = "atmel,24c256"; >> + reg = <0x50>; >> + pagesize = <64>; >> + >> + nvmem-layout { >> + compatible = "fixed-layout"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + >> + mac_addr0: mac-addr@0 { >> + reg = <0x0 0x6>; >> + }; >> + }; >> + }; >> +}; >> + >> +&i2c15 { >> + pinctrl-0 = <&qup_i2c15_default>; >> + pinctrl-names = "default"; >> + >> + status = "okay"; >> + >> + expander0: pca953x@38 { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x38>; >> + }; >> + >> + expander1: pca953x@39 { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x39>; >> + }; >> + >> + expander2: pca953x@3a { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3a>; >> + }; >> + >> + expander3: pca953x@3b { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3b>; >> + }; >> + >> + expander4: pca953x@3c { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3c>; >> + }; >> + >> + expander5: pca953x@3d { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3d>; >> + }; >> + >> + expander6: pca953x@3e { >> + compatible = "ti,tca9538"; >> + #gpio-cells = <2>; >> + gpio-controller; >> + reg = <0x3e>; >> + }; >> +}; >> + >> +&iris { >> + status = "okay"; >> +}; >> + >> +&qupv3_id_0 { >> + status = "okay"; >> +}; >> + >> +&qupv3_id_1 { >> + status = "okay"; >> +}; >> + >> +&remoteproc_adsp { >> + firmware-name = "qcom/qcs8300/adsp.mbn"; >> + >> + status = "okay"; >> +}; >> + >> +&remoteproc_cdsp { >> + firmware-name = "qcom/qcs8300/cdsp0.mbn"; >> + >> + status = "okay"; >> +}; >> + >> +&remoteproc_gpdsp { >> + firmware-name = "qcom/qcs8300/gpdsp0.mbn"; >> + >> + status = "okay"; >> +}; >> + >> +&serdes0 { >> + phy-supply = <&vreg_l4a>; >> + >> + status = "okay"; >> +}; >> + >> +&tlmm { >> + ethernet0_default: ethernet0-default-state { >> + ethernet0_mdc: ethernet0-mdc-pins { >> + pins = "gpio5"; >> + function = "emac0_mdc"; >> + drive-strength = <16>; >> + bias-pull-up; >> + }; >> + >> + ethernet0_mdio: ethernet0-mdio-pins { >> + pins = "gpio6"; >> + function = "emac0_mdio"; >> + drive-strength = <16>; >> + bias-pull-up; >> + }; >> + }; >> + >> + qup_i2c1_default: qup-i2c1-state { >> + pins = "gpio19", "gpio20"; >> + function = "qup0_se1"; >> + drive-strength = <2>; >> + bias-pull-up; >> + }; >> + >> + qup_i2c15_default: qup-i2c15-state { >> + pins = "gpio91", "gpio92"; >> + function = "qup1_se7"; >> + drive-strength = <2>; >> + bias-pull-up; >> + }; >> +}; >> + >> +&uart7 { >> + status = "okay"; >> +}; >> + >> +&ufs_mem_hc { >> + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; >> + vcc-supply = <&vreg_l8a>; >> + vcc-max-microamp = <1100000>; >> + vccq-supply = <&vreg_l4c>; >> + vccq-max-microamp = <1200000>; >> + >> + status = "okay"; >> +}; >> + >> +&ufs_mem_phy { >> + vdda-phy-supply = <&vreg_l4a>; >> + vdda-pll-supply = <&vreg_l5a>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_1 { >> + status = "okay"; >> +}; >> + >> +&usb_1_dwc3 { >> + dr_mode = "peripheral"; >> +}; >> + >> +&usb_1_hsphy { >> + vdda-pll-supply = <&vreg_l7a>; >> + vdda18-supply = <&vreg_l7c>; >> + vdda33-supply = <&vreg_l9a>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_qmpphy { >> + vdda-phy-supply = <&vreg_l7a>; >> + vdda-pll-supply = <&vreg_l5a>; >> + >> + status = "okay"; >> +}; >> -- >> 2.34.1 >> ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-26 18:15 ` [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support Umang Chheda 2025-08-27 1:42 ` Dmitry Baryshkov 2025-08-27 17:58 ` Bjorn Andersson @ 2025-08-29 7:59 ` Krzysztof Kozlowski 2025-09-02 12:33 ` Umang Chheda 2 siblings, 1 reply; 14+ messages in thread From: Krzysztof Kozlowski @ 2025-08-29 7:59 UTC (permalink / raw) To: Umang Chheda Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia, Swati Agarwal On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: > +&i2c1 { > + pinctrl-0 = <&qup_i2c1_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > + > + eeprom0: eeprom@50 { > + compatible = "atmel,24c256"; > + reg = <0x50>; > + pagesize = <64>; > + > + nvmem-layout { > + compatible = "fixed-layout"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + mac_addr0: mac-addr@0 { > + reg = <0x0 0x6>; > + }; > + }; > + }; > +}; > + > +&i2c15 { > + pinctrl-0 = <&qup_i2c15_default>; > + pinctrl-names = "default"; > + > + status = "okay"; > + > + expander0: pca953x@38 { Same problem as in all other recent qcom boards. I heard that some teams in qcom have weekly meetings and discuss what did they learn from upstream review. Please organize/join such meetings. Node names should be generic. See also an explanation and list of examples (not exhaustive) in DT specification: https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation If you cannot find a name matching your device, please check in kernel sources for similar cases or you can grow the spec (via pull request to DT spec repo). Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support 2025-08-29 7:59 ` Krzysztof Kozlowski @ 2025-09-02 12:33 ` Umang Chheda 0 siblings, 0 replies; 14+ messages in thread From: Umang Chheda @ 2025-09-02 12:33 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Richard Cochran, linux-arm-msm, devicetree, linux-kernel, Rakesh Kota, Nirmesh Kumar Singh, Viken Dadhaniya, Mohd Ayaan Anwar, Arun Khannna, Monish Chunara, Vikash Garodia, Swati Agarwal On 8/29/2025 1:29 PM, Krzysztof Kozlowski wrote: > On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote: >> +&i2c1 { >> + pinctrl-0 = <&qup_i2c1_default>; >> + pinctrl-names = "default"; >> + >> + status = "okay"; >> + >> + eeprom0: eeprom@50 { >> + compatible = "atmel,24c256"; >> + reg = <0x50>; >> + pagesize = <64>; >> + >> + nvmem-layout { >> + compatible = "fixed-layout"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + >> + mac_addr0: mac-addr@0 { >> + reg = <0x0 0x6>; >> + }; >> + }; >> + }; >> +}; >> + >> +&i2c15 { >> + pinctrl-0 = <&qup_i2c15_default>; >> + pinctrl-names = "default"; >> + >> + status = "okay"; >> + >> + expander0: pca953x@38 { > > Same problem as in all other recent qcom boards. > > I heard that some teams in qcom have weekly meetings and discuss what > did they learn from upstream review. > > Please organize/join such meetings. > > Node names should be generic. See also an explanation and list of > examples (not exhaustive) in DT specification: > https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > If you cannot find a name matching your device, please check in kernel > sources for similar cases or you can grow the spec (via pull request to > DT spec repo). > Ack, will take care of this in subsequent patches. > Best regards, > Krzysztof > ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2025-09-05 13:41 UTC | newest] Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2025-08-26 18:15 [PATCH v3 0/2] Introduce support for Monaco Evaluation Kit Umang Chheda 2025-08-26 18:15 ` [PATCH v3 1/2] dt-bindings: arm: qcom: Add Monaco EVK support Umang Chheda 2025-08-29 7:57 ` Krzysztof Kozlowski 2025-08-26 18:15 ` [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board support Umang Chheda 2025-08-27 1:42 ` Dmitry Baryshkov 2025-09-03 10:05 ` Vikash Garodia 2025-09-03 11:03 ` Dmitry Baryshkov 2025-09-03 11:07 ` Vikash Garodia 2025-09-05 13:24 ` Swati Agarwal 2025-09-05 13:41 ` Dmitry Baryshkov 2025-08-27 17:58 ` Bjorn Andersson 2025-09-02 12:42 ` Umang Chheda 2025-08-29 7:59 ` Krzysztof Kozlowski 2025-09-02 12:33 ` Umang Chheda
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