* [PATCH 1/5] drm/mediatek: Support "None" blending in OVL
2024-06-19 17:27 [PATCH 0/5] Support alpha blending in MTK display driver Hsiao Chien Sung via B4 Relay
@ 2024-06-19 17:27 ` Hsiao Chien Sung via B4 Relay
2024-06-19 17:27 ` [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer Hsiao Chien Sung via B4 Relay
` (3 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Hsiao Chien Sung via B4 Relay @ 2024-06-19 17:27 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, linux-kernel, linux-arm-kernel,
Hsiao Chien Sung, CK Hu
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index 4b370bc0746d..ad9228fc4dd9 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -439,6 +439,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
unsigned int fmt = pending->format;
unsigned int offset = (pending->y << 16) | pending->x;
unsigned int src_size = (pending->height << 16) | pending->width;
+ unsigned int blend_mode = state->base.pixel_blend_mode;
unsigned int ignore_pixel_alpha = 0;
unsigned int con;
bool is_afbc = pending->modifier != DRM_FORMAT_MOD_LINEAR;
@@ -468,7 +469,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
* For RGB888 related formats, whether CONST_BLD is enabled or not won't
* affect the result. Therefore we use !has_alpha as the condition.
*/
- if (state->base.fb && !state->base.fb->format->has_alpha)
+ if ((state->base.fb && !state->base.fb->format->has_alpha) ||
+ blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
ignore_pixel_alpha = OVL_CONST_BLEND;
if (pending->rotation & DRM_MODE_REFLECT_Y) {
--
Git-146)
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-06-19 17:27 [PATCH 0/5] Support alpha blending in MTK display driver Hsiao Chien Sung via B4 Relay
2024-06-19 17:27 ` [PATCH 1/5] drm/mediatek: Support "None" blending in OVL Hsiao Chien Sung via B4 Relay
@ 2024-06-19 17:27 ` Hsiao Chien Sung via B4 Relay
2024-07-01 2:22 ` CK Hu (胡俊光)
2024-07-01 3:10 ` CK Hu (胡俊光)
2024-06-19 17:27 ` [PATCH 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL Hsiao Chien Sung via B4 Relay
` (2 subsequent siblings)
4 siblings, 2 replies; 13+ messages in thread
From: Hsiao Chien Sung via B4 Relay @ 2024-06-19 17:27 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, linux-kernel, linux-arm-kernel,
Hsiao Chien Sung
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Support "None" alpha blending mode on MediaTek's chips.
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
index 36021cb8df62..48b714994492 100644
--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
+++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
@@ -3,6 +3,7 @@
* Copyright (c) 2021 MediaTek Inc.
*/
+#include <drm/drm_blend.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#include <linux/clk.h>
@@ -35,6 +36,7 @@
#define MIX_SRC_L0_EN BIT(0)
#define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n))
#define NON_PREMULTI_SOURCE (2 << 12)
+#define PREMULTI_SOURCE (3 << 12)
#define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n))
#define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n))
#define MIX_FUNC_DCM0 0x120
@@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
alpha_con |= state->base.alpha & MIXER_ALPHA;
}
- if (state->base.fb && !state->base.fb->format->has_alpha) {
+ if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
+ alpha_con |= PREMULTI_SOURCE;
+ else
+ alpha_con |= NON_PREMULTI_SOURCE;
+
+ if ((state->base.fb && !state->base.fb->format->has_alpha) ||
+ state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
/*
* Mixer doesn't support CONST_BLD mode,
* use a trick to make the output equivalent
@@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base,
mixer->regs, MIX_L_SRC_SIZE(idx));
mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx));
- mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx),
- 0x1ff);
+ mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx));
mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON,
BIT(idx));
}
--
Git-146)
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-06-19 17:27 ` [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer Hsiao Chien Sung via B4 Relay
@ 2024-07-01 2:22 ` CK Hu (胡俊光)
2024-07-04 1:43 ` Shawn Sung (宋孝謙)
2024-07-01 3:10 ` CK Hu (胡俊光)
1 sibling, 1 reply; 13+ messages in thread
From: CK Hu (胡俊光) @ 2024-07-01 2:22 UTC (permalink / raw)
To: p.zabel, Shawn Sung (宋孝謙),
airlied, daniel, chunkuang.hu, angelogioacchino.delregno,
matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi, Shawn:
On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay wrote:
>
> External email : Please do not click links or open attachments until you have verified the sender or the content.
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
>
> Support "None" alpha blending mode on MediaTek's chips.
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> index 36021cb8df62..48b714994492 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> @@ -3,6 +3,7 @@
> * Copyright (c) 2021 MediaTek Inc.
> */
>
> +#include <drm/drm_blend.h>
> #include <drm/drm_fourcc.h>
> #include <drm/drm_framebuffer.h>
> #include <linux/clk.h>
> @@ -35,6 +36,7 @@
> #define MIX_SRC_L0_ENBIT(0)
> #define MIX_L_SRC_CON(n)(0x28 + 0x18 * (n))
> #define NON_PREMULTI_SOURCE(2 << 12)
> +#define PREMULTI_SOURCE(3 << 12)
> #define MIX_L_SRC_SIZE(n)(0x30 + 0x18 * (n))
> #define MIX_L_SRC_OFFSET(n)(0x34 + 0x18 * (n))
> #define MIX_FUNC_DCM00x120
> @@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> alpha_con |= state->base.alpha & MIXER_ALPHA;
> }
>
> -if (state->base.fb && !state->base.fb->format->has_alpha) {
> +if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
> +alpha_con |= PREMULTI_SOURCE;
> +else
> +alpha_con |= NON_PREMULTI_SOURCE;
Coverage mode is an already support mode, but this patch modify alpha_con for coverage mode.
So this is a bug fix?
Regards,
CK
> +
> +if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> /*
> * Mixer doesn't support CONST_BLD mode,
> * use a trick to make the output equivalent
> @@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base,
> mixer->regs, MIX_L_SRC_SIZE(idx));
> mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx));
> -mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx),
> - 0x1ff);
> +mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx));
> mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON,
> BIT(idx));
> }
>
> --
> Git-146)
>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-07-01 2:22 ` CK Hu (胡俊光)
@ 2024-07-04 1:43 ` Shawn Sung (宋孝謙)
2024-07-05 9:36 ` CK Hu (胡俊光)
0 siblings, 1 reply; 13+ messages in thread
From: Shawn Sung (宋孝謙) @ 2024-07-04 1:43 UTC (permalink / raw)
To: CK Hu (胡俊光),
p.zabel, airlied, daniel, chunkuang.hu,
angelogioacchino.delregno, matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi CK,
On Mon, 2024-07-01 at 02:22 +0000, CK Hu (胡俊光) wrote:
> Hi, Shawn:
>
> On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay
> wrote:
> >
> > External email : Please do not click links or open attachments
> > until you have verified the sender or the content.
> > From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> >
> > Support "None" alpha blending mode on MediaTek's chips.
> >
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
> > 1 file changed, 10 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > index 36021cb8df62..48b714994492 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > @@ -3,6 +3,7 @@
> > * Copyright (c) 2021 MediaTek Inc.
> > */
> >
> > +#include <drm/drm_blend.h>
> > #include <drm/drm_fourcc.h>
> > #include <drm/drm_framebuffer.h>
> > #include <linux/clk.h>
> > @@ -35,6 +36,7 @@
> > #define MIX_SRC_L0_ENBIT(0)
> > #define MIX_L_SRC_CON(n)(0x28 + 0x18 * (n))
> > #define NON_PREMULTI_SOURCE(2 << 12)
> > +#define PREMULTI_SOURCE(3 << 12)
> > #define MIX_L_SRC_SIZE(n)(0x30 + 0x18 * (n))
> > #define MIX_L_SRC_OFFSET(n)(0x34 + 0x18 * (n))
> > #define MIX_FUNC_DCM00x120
> > @@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device
> > *dev, unsigned int idx,
> > alpha_con |= state->base.alpha & MIXER_ALPHA;
> > }
> >
> > -if (state->base.fb && !state->base.fb->format->has_alpha) {
> > +if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
> > +alpha_con |= PREMULTI_SOURCE;
> > +else
> > +alpha_con |= NON_PREMULTI_SOURCE;
>
> Coverage mode is an already support mode, but this patch modify
> alpha_con for coverage mode.
> So this is a bug fix?
In oreder to replace the default setting that is set in
mtk_ethdr_config(), we change mtk_ddp_write_mask() to mtk_ddp_write(),
and this change will also reset NON_PREMULTI_SOURCE bit that was
assigned in mtk_ethdr_config(). Therefore, we must still set
NON_PREMULTI_SOURCE bit if the blend mode is not
DRM_MODE_BLEND_PIXEL_NONE.
Regards,
Shawn
>
> Regards,
> CK
>
> > +
> > +if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> > + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> > /*
> > * Mixer doesn't support CONST_BLD mode,
> > * use a trick to make the output equivalent
> > @@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev,
> > unsigned int idx,
> > mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width,
> > &mixer->cmdq_base,
> > mixer->regs, MIX_L_SRC_SIZE(idx));
> > mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs,
> > MIX_L_SRC_OFFSET(idx));
> > -mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer-
> > >regs, MIX_L_SRC_CON(idx),
> > - 0x1ff);
> > +mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs,
> > MIX_L_SRC_CON(idx));
> > mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer-
> > >regs, MIX_SRC_CON,
> > BIT(idx));
> > }
> >
> > --
> > Git-146)
> >
> >
> >
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-07-04 1:43 ` Shawn Sung (宋孝謙)
@ 2024-07-05 9:36 ` CK Hu (胡俊光)
0 siblings, 0 replies; 13+ messages in thread
From: CK Hu (胡俊光) @ 2024-07-05 9:36 UTC (permalink / raw)
To: p.zabel, Shawn Sung (宋孝謙),
airlied, daniel, chunkuang.hu, angelogioacchino.delregno,
matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi, Shawn:
On Thu, 2024-07-04 at 01:43 +0000, Shawn Sung (宋孝謙) wrote:
> Hi CK,
>
> On Mon, 2024-07-01 at 02:22 +0000, CK Hu (胡俊光) wrote:
> > Hi, Shawn:
> >
> > On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay
> > wrote:
> > >
> > > External email : Please do not click links or open attachments
> > > until you have verified the sender or the content.
> > > From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > >
> > > Support "None" alpha blending mode on MediaTek's chips.
> > >
> > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > > ---
> > > drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
> > > 1 file changed, 10 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > index 36021cb8df62..48b714994492 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > @@ -3,6 +3,7 @@
> > > * Copyright (c) 2021 MediaTek Inc.
> > > */
> > >
> > > +#include <drm/drm_blend.h>
> > > #include <drm/drm_fourcc.h>
> > > #include <drm/drm_framebuffer.h>
> > > #include <linux/clk.h>
> > > @@ -35,6 +36,7 @@
> > > #define MIX_SRC_L0_ENBIT(0)
> > > #define MIX_L_SRC_CON(n)(0x28 + 0x18 * (n))
> > > #define NON_PREMULTI_SOURCE(2 << 12)
> > > +#define PREMULTI_SOURCE(3 << 12)
> > > #define MIX_L_SRC_SIZE(n)(0x30 + 0x18 * (n))
> > > #define MIX_L_SRC_OFFSET(n)(0x34 + 0x18 * (n))
> > > #define MIX_FUNC_DCM00x120
> > > @@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device
> > > *dev, unsigned int idx,
> > > alpha_con |= state->base.alpha & MIXER_ALPHA;
> > > }
> > >
> > > -if (state->base.fb && !state->base.fb->format->has_alpha) {
> > > +if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
> > > +alpha_con |= PREMULTI_SOURCE;
> > > +else
> > > +alpha_con |= NON_PREMULTI_SOURCE;
> >
> > Coverage mode is an already support mode, but this patch modify
> > alpha_con for coverage mode.
> > So this is a bug fix?
>
> In oreder to replace the default setting that is set in
> mtk_ethdr_config(), we change mtk_ddp_write_mask() to mtk_ddp_write(),
> and this change will also reset NON_PREMULTI_SOURCE bit that was
> assigned in mtk_ethdr_config(). Therefore, we must still set
> NON_PREMULTI_SOURCE bit if the blend mode is not
> DRM_MODE_BLEND_PIXEL_NONE.
Add this information in commit message so others would not be confused.
Regards,
CK
>
> Regards,
> Shawn
>
> >
> > Regards,
> > CK
> >
> > > +
> > > +if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> > > + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> > > /*
> > > * Mixer doesn't support CONST_BLD mode,
> > > * use a trick to make the output equivalent
> > > @@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev,
> > > unsigned int idx,
> > > mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width,
> > > &mixer->cmdq_base,
> > > mixer->regs, MIX_L_SRC_SIZE(idx));
> > > mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs,
> > > MIX_L_SRC_OFFSET(idx));
> > > -mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer-
> > > > regs, MIX_L_SRC_CON(idx),
> > >
> > > - 0x1ff);
> > > +mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs,
> > > MIX_L_SRC_CON(idx));
> > > mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer-
> > > > regs, MIX_SRC_CON,
> > >
> > > BIT(idx));
> > > }
> > >
> > > --
> > > Git-146)
> > >
> > >
> > >
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-06-19 17:27 ` [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer Hsiao Chien Sung via B4 Relay
2024-07-01 2:22 ` CK Hu (胡俊光)
@ 2024-07-01 3:10 ` CK Hu (胡俊光)
2024-07-04 1:35 ` Shawn Sung (宋孝謙)
1 sibling, 1 reply; 13+ messages in thread
From: CK Hu (胡俊光) @ 2024-07-01 3:10 UTC (permalink / raw)
To: p.zabel, Shawn Sung (宋孝謙),
airlied, daniel, chunkuang.hu, angelogioacchino.delregno,
matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi, Shawn:
On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay wrote:
>
> External email : Please do not click links or open attachments until you have verified the sender or the content.
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
>
> Support "None" alpha blending mode on MediaTek's chips.
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
> 1 file changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> index 36021cb8df62..48b714994492 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> @@ -3,6 +3,7 @@
> * Copyright (c) 2021 MediaTek Inc.
> */
>
> +#include <drm/drm_blend.h>
> #include <drm/drm_fourcc.h>
> #include <drm/drm_framebuffer.h>
> #include <linux/clk.h>
> @@ -35,6 +36,7 @@
> #define MIX_SRC_L0_ENBIT(0)
> #define MIX_L_SRC_CON(n)(0x28 + 0x18 * (n))
> #define NON_PREMULTI_SOURCE(2 << 12)
> +#define PREMULTI_SOURCE(3 << 12)
> #define MIX_L_SRC_SIZE(n)(0x30 + 0x18 * (n))
> #define MIX_L_SRC_OFFSET(n)(0x34 + 0x18 * (n))
> #define MIX_FUNC_DCM00x120
> @@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> alpha_con |= state->base.alpha & MIXER_ALPHA;
> }
>
> -if (state->base.fb && !state->base.fb->format->has_alpha) {
> +if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
> +alpha_con |= PREMULTI_SOURCE;
To support DRM_MODE_BLEND_PIXEL_NONE, I think ignore pixel alpha is enough. Why need this setting?
Regards,
CK
> +else
> +alpha_con |= NON_PREMULTI_SOURCE;
> +
> +if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> /*
> * Mixer doesn't support CONST_BLD mode,
> * use a trick to make the output equivalent
> @@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base,
> mixer->regs, MIX_L_SRC_SIZE(idx));
> mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx));
> -mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx),
> - 0x1ff);
> +mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx));
> mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON,
> BIT(idx));
> }
>
> --
> Git-146)
>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-07-01 3:10 ` CK Hu (胡俊光)
@ 2024-07-04 1:35 ` Shawn Sung (宋孝謙)
2024-07-05 9:49 ` CK Hu (胡俊光)
0 siblings, 1 reply; 13+ messages in thread
From: Shawn Sung (宋孝謙) @ 2024-07-04 1:35 UTC (permalink / raw)
To: CK Hu (胡俊光),
p.zabel, airlied, daniel, chunkuang.hu,
angelogioacchino.delregno, matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi CK,
On Mon, 2024-07-01 at 03:10 +0000, CK Hu (胡俊光) wrote:
> Hi, Shawn:
>
> On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay
> wrote:
> >
> > External email : Please do not click links or open attachments
> > until you have verified the sender or the content.
> > From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> >
> > Support "None" alpha blending mode on MediaTek's chips.
> >
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
> > 1 file changed, 10 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > index 36021cb8df62..48b714994492 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > @@ -3,6 +3,7 @@
> > * Copyright (c) 2021 MediaTek Inc.
> > */
> >
> > +#include <drm/drm_blend.h>
> > #include <drm/drm_fourcc.h>
> > #include <drm/drm_framebuffer.h>
> > #include <linux/clk.h>
> > @@ -35,6 +36,7 @@
> > #define MIX_SRC_L0_ENBIT(0)
> > #define MIX_L_SRC_CON(n)(0x28 + 0x18 * (n))
> > #define NON_PREMULTI_SOURCE(2 << 12)
> > +#define PREMULTI_SOURCE(3 << 12)
> > #define MIX_L_SRC_SIZE(n)(0x30 + 0x18 * (n))
> > #define MIX_L_SRC_OFFSET(n)(0x34 + 0x18 * (n))
> > #define MIX_FUNC_DCM00x120
> > @@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device
> > *dev, unsigned int idx,
> > alpha_con |= state->base.alpha & MIXER_ALPHA;
> > }
> >
> > -if (state->base.fb && !state->base.fb->format->has_alpha) {
> > +if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
> > +alpha_con |= PREMULTI_SOURCE;
>
> To support DRM_MODE_BLEND_PIXEL_NONE, I think ignore pixel alpha is
> enough. Why need this setting?
Yes, by setting PREMULTI_SOURCE bit, ETHDR will ignore the pixel alpha
of the layer.
Thanks,
Shawn
>
> Regards,
> CK
>
> > +else
> > +alpha_con |= NON_PREMULTI_SOURCE;
> > +
> > +if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> > + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> > /*
> > * Mixer doesn't support CONST_BLD mode,
> > * use a trick to make the output equivalent
> > @@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev,
> > unsigned int idx,
> > mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width,
> > &mixer->cmdq_base,
> > mixer->regs, MIX_L_SRC_SIZE(idx));
> > mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs,
> > MIX_L_SRC_OFFSET(idx));
> > -mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer-
> > >regs, MIX_L_SRC_CON(idx),
> > - 0x1ff);
> > +mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs,
> > MIX_L_SRC_CON(idx));
> > mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer-
> > >regs, MIX_SRC_CON,
> > BIT(idx));
> > }
> >
> > --
> > Git-146)
> >
> >
> >
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer
2024-07-04 1:35 ` Shawn Sung (宋孝謙)
@ 2024-07-05 9:49 ` CK Hu (胡俊光)
0 siblings, 0 replies; 13+ messages in thread
From: CK Hu (胡俊光) @ 2024-07-05 9:49 UTC (permalink / raw)
To: p.zabel, Shawn Sung (宋孝謙),
airlied, daniel, chunkuang.hu, angelogioacchino.delregno,
matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi, Shawn:
On Thu, 2024-07-04 at 01:35 +0000, Shawn Sung (宋孝謙) wrote:
> Hi CK,
>
> On Mon, 2024-07-01 at 03:10 +0000, CK Hu (胡俊光) wrote:
> > Hi, Shawn:
> >
> > On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay
> > wrote:
> > >
> > > External email : Please do not click links or open attachments
> > > until you have verified the sender or the content.
> > > From: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > >
> > > Support "None" alpha blending mode on MediaTek's chips.
> > >
> > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > > ---
> > > drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++++++++++---
> > > 1 file changed, 10 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > index 36021cb8df62..48b714994492 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> > > @@ -3,6 +3,7 @@
> > > * Copyright (c) 2021 MediaTek Inc.
> > > */
> > >
> > > +#include <drm/drm_blend.h>
> > > #include <drm/drm_fourcc.h>
> > > #include <drm/drm_framebuffer.h>
> > > #include <linux/clk.h>
> > > @@ -35,6 +36,7 @@
> > > #define MIX_SRC_L0_ENBIT(0)
> > > #define MIX_L_SRC_CON(n)(0x28 + 0x18 * (n))
> > > #define NON_PREMULTI_SOURCE(2 << 12)
> > > +#define PREMULTI_SOURCE(3 << 12)
> > > #define MIX_L_SRC_SIZE(n)(0x30 + 0x18 * (n))
> > > #define MIX_L_SRC_OFFSET(n)(0x34 + 0x18 * (n))
> > > #define MIX_FUNC_DCM00x120
> > > @@ -175,7 +177,13 @@ void mtk_ethdr_layer_config(struct device
> > > *dev, unsigned int idx,
> > > alpha_con |= state->base.alpha & MIXER_ALPHA;
> > > }
> > >
> > > -if (state->base.fb && !state->base.fb->format->has_alpha) {
> > > +if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
> > > +alpha_con |= PREMULTI_SOURCE;
> >
> > To support DRM_MODE_BLEND_PIXEL_NONE, I think ignore pixel alpha is
> > enough. Why need this setting?
>
> Yes, by setting PREMULTI_SOURCE bit, ETHDR will ignore the pixel alpha
> of the layer.
In the later code, replace_src_a would be set to true.
I think replace_src_a is enough to implement DRM_MODE_BLEND_PIXEL_NONE.
So it's not necessary to set PREMULTI_SOURCE.
Regards,
CK
>
> Thanks,
> Shawn
>
> >
> > Regards,
> > CK
> >
> > > +else
> > > +alpha_con |= NON_PREMULTI_SOURCE;
> > > +
> > > +if ((state->base.fb && !state->base.fb->format->has_alpha) ||
> > > + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) {
> > > /*
> > > * Mixer doesn't support CONST_BLD mode,
> > > * use a trick to make the output equivalent
> > > @@ -191,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev,
> > > unsigned int idx,
> > > mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width,
> > > &mixer->cmdq_base,
> > > mixer->regs, MIX_L_SRC_SIZE(idx));
> > > mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs,
> > > MIX_L_SRC_OFFSET(idx));
> > > -mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer-
> > > > regs, MIX_L_SRC_CON(idx),
> > >
> > > - 0x1ff);
> > > +mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs,
> > > MIX_L_SRC_CON(idx));
> > > mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer-
> > > > regs, MIX_SRC_CON,
> > >
> > > BIT(idx));
> > > }
> > >
> > > --
> > > Git-146)
> > >
> > >
> > >
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL
2024-06-19 17:27 [PATCH 0/5] Support alpha blending in MTK display driver Hsiao Chien Sung via B4 Relay
2024-06-19 17:27 ` [PATCH 1/5] drm/mediatek: Support "None" blending in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 17:27 ` [PATCH 2/5] drm/mediatek: Support "None" blending in Mixer Hsiao Chien Sung via B4 Relay
@ 2024-06-19 17:27 ` Hsiao Chien Sung via B4 Relay
2024-07-01 2:35 ` CK Hu (胡俊光)
2024-06-19 17:27 ` [PATCH 4/5] drm/mediatek: Support "Pre-multiplied" blending in Mixer Hsiao Chien Sung via B4 Relay
2024-06-19 17:27 ` [PATCH 5/5] drm/mediatek: Support alpha blending in display driver Hsiao Chien Sung via B4 Relay
4 siblings, 1 reply; 13+ messages in thread
From: Hsiao Chien Sung via B4 Relay @ 2024-06-19 17:27 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, linux-kernel, linux-arm-kernel,
Hsiao Chien Sung
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Support "Pre-multiplied" alpha blending mode on in OVL.
Before this patch, only the "coverage" mode is supported.
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +++++++++++++++++++++++++-------
1 file changed, 25 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index ad9228fc4dd9..8e9aae36a289 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
@@ -52,8 +52,12 @@
#define GMC_THRESHOLD_HIGH ((1 << GMC_THRESHOLD_BITS) / 4)
#define GMC_THRESHOLD_LOW ((1 << GMC_THRESHOLD_BITS) / 8)
+#define OVL_CON_CLRFMT_MAN BIT(23)
#define OVL_CON_BYTE_SWAP BIT(24)
-#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
+
+/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */
+#define OVL_CON_RGB_SWAP BIT(25)
+
#define OVL_CON_CLRFMT_RGB (1 << 12)
#define OVL_CON_CLRFMT_ARGB8888 (2 << 12)
#define OVL_CON_CLRFMT_RGBA8888 (3 << 12)
@@ -61,6 +65,11 @@
#define OVL_CON_CLRFMT_BGRA8888 (OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SWAP)
#define OVL_CON_CLRFMT_UYVY (4 << 12)
#define OVL_CON_CLRFMT_YUYV (5 << 12)
+#define OVL_CON_MTX_YUV_TO_RGB (6 << 16)
+#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN)
+#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_SWAP)
+#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_SWAP)
+#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_SWAP)
#define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \
0 : OVL_CON_CLRFMT_RGB)
#define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \
@@ -382,7 +391,8 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
DISP_REG_OVL_RDMA_CTRL(idx));
}
-static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
+static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt,
+ unsigned int blend_mode)
{
/* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX"
* is defined in mediatek HW data sheet.
@@ -403,22 +413,30 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
case DRM_FORMAT_RGBA8888:
case DRM_FORMAT_RGBX1010102:
case DRM_FORMAT_RGBA1010102:
- return OVL_CON_CLRFMT_RGBA8888;
+ return blend_mode == DRM_MODE_BLEND_COVERAGE ?
+ OVL_CON_CLRFMT_RGBA8888 :
+ OVL_CON_CLRFMT_PRGBA8888;
case DRM_FORMAT_BGRX8888:
case DRM_FORMAT_BGRA8888:
case DRM_FORMAT_BGRX1010102:
case DRM_FORMAT_BGRA1010102:
- return OVL_CON_CLRFMT_BGRA8888;
+ return blend_mode == DRM_MODE_BLEND_COVERAGE ?
+ OVL_CON_CLRFMT_BGRA8888 :
+ OVL_CON_CLRFMT_PBGRA8888;
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_ARGB2101010:
- return OVL_CON_CLRFMT_ARGB8888;
+ return blend_mode == DRM_MODE_BLEND_COVERAGE ?
+ OVL_CON_CLRFMT_ARGB8888 :
+ OVL_CON_CLRFMT_PARGB8888;
case DRM_FORMAT_XBGR8888:
case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_ABGR2101010:
- return OVL_CON_CLRFMT_ABGR8888;
+ return blend_mode == DRM_MODE_BLEND_COVERAGE ?
+ OVL_CON_CLRFMT_ABGR8888 :
+ OVL_CON_CLRFMT_PABGR8888;
case DRM_FORMAT_UYVY:
return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
case DRM_FORMAT_YUYV:
@@ -458,7 +476,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
return;
}
- con = ovl_fmt_convert(ovl, fmt);
+ con = ovl_fmt_convert(ovl, fmt, blend_mode);
if (state->base.fb) {
con |= OVL_CON_AEN;
con |= state->base.alpha & OVL_CON_ALPHA;
--
Git-146)
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL
2024-06-19 17:27 ` [PATCH 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL Hsiao Chien Sung via B4 Relay
@ 2024-07-01 2:35 ` CK Hu (胡俊光)
0 siblings, 0 replies; 13+ messages in thread
From: CK Hu (胡俊光) @ 2024-07-01 2:35 UTC (permalink / raw)
To: p.zabel, Shawn Sung (宋孝謙),
airlied, daniel, chunkuang.hu, angelogioacchino.delregno,
matthias.bgg
Cc: dri-devel, linux-kernel, linux-mediatek, linux-arm-kernel
Hi, Shawn:
On Thu, 2024-06-20 at 01:27 +0800, Hsiao Chien Sung via B4 Relay wrote:
>
> External email : Please do not click links or open attachments until you have verified the sender or the content.
> From: Hsiao Chien Sung <shawn.sung@mediatek.com>
>
> Support "Pre-multiplied" alpha blending mode on in OVL.
> Before this patch, only the "coverage" mode is supported.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
>
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +++++++++++++++++++++++++-------
> 1 file changed, 25 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index ad9228fc4dd9..8e9aae36a289 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -52,8 +52,12 @@
> #define GMC_THRESHOLD_HIGH((1 << GMC_THRESHOLD_BITS) / 4)
> #define GMC_THRESHOLD_LOW((1 << GMC_THRESHOLD_BITS) / 8)
>
> +#define OVL_CON_CLRFMT_MANBIT(23)
> #define OVL_CON_BYTE_SWAPBIT(24)
> -#define OVL_CON_MTX_YUV_TO_RGB(6 << 16)
> +
> +/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */
> +#define OVL_CON_RGB_SWAPBIT(25)
> +
> #define OVL_CON_CLRFMT_RGB(1 << 12)
> #define OVL_CON_CLRFMT_ARGB8888(2 << 12)
> #define OVL_CON_CLRFMT_RGBA8888(3 << 12)
> @@ -61,6 +65,11 @@
> #define OVL_CON_CLRFMT_BGRA8888(OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SWAP)
> #define OVL_CON_CLRFMT_UYVY(4 << 12)
> #define OVL_CON_CLRFMT_YUYV(5 << 12)
> +#define OVL_CON_MTX_YUV_TO_RGB(6 << 16)
> +#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN)
> +#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_SWAP)
> +#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_SWAP)
> +#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_SWAP)
> #define OVL_CON_CLRFMT_RGB565(ovl)((ovl)->data->fmt_rgb565_is_0 ? \
> 0 : OVL_CON_CLRFMT_RGB)
> #define OVL_CON_CLRFMT_RGB888(ovl)((ovl)->data->fmt_rgb565_is_0 ? \
> @@ -382,7 +391,8 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
> DISP_REG_OVL_RDMA_CTRL(idx));
> }
>
> -static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
> +static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt,
> + unsigned int blend_mode)
> {
> /* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX"
> * is defined in mediatek HW data sheet.
> @@ -403,22 +413,30 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt)
> case DRM_FORMAT_RGBA8888:
> case DRM_FORMAT_RGBX1010102:
> case DRM_FORMAT_RGBA1010102:
> -return OVL_CON_CLRFMT_RGBA8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_RGBA8888 :
> + OVL_CON_CLRFMT_PRGBA8888;
> case DRM_FORMAT_BGRX8888:
> case DRM_FORMAT_BGRA8888:
> case DRM_FORMAT_BGRX1010102:
> case DRM_FORMAT_BGRA1010102:
> -return OVL_CON_CLRFMT_BGRA8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_BGRA8888 :
> + OVL_CON_CLRFMT_PBGRA8888;
> case DRM_FORMAT_XRGB8888:
> case DRM_FORMAT_ARGB8888:
> case DRM_FORMAT_XRGB2101010:
> case DRM_FORMAT_ARGB2101010:
> -return OVL_CON_CLRFMT_ARGB8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_ARGB8888 :
> + OVL_CON_CLRFMT_PARGB8888;
> case DRM_FORMAT_XBGR8888:
> case DRM_FORMAT_ABGR8888:
> case DRM_FORMAT_XBGR2101010:
> case DRM_FORMAT_ABGR2101010:
> -return OVL_CON_CLRFMT_ABGR8888;
> +return blend_mode == DRM_MODE_BLEND_COVERAGE ?
> + OVL_CON_CLRFMT_ABGR8888 :
> + OVL_CON_CLRFMT_PABGR8888;
> case DRM_FORMAT_UYVY:
> return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB;
> case DRM_FORMAT_YUYV:
> @@ -458,7 +476,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> return;
> }
>
> -con = ovl_fmt_convert(ovl, fmt);
> +con = ovl_fmt_convert(ovl, fmt, blend_mode);
> if (state->base.fb) {
> con |= OVL_CON_AEN;
> con |= state->base.alpha & OVL_CON_ALPHA;
>
> --
> Git-146)
>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 4/5] drm/mediatek: Support "Pre-multiplied" blending in Mixer
2024-06-19 17:27 [PATCH 0/5] Support alpha blending in MTK display driver Hsiao Chien Sung via B4 Relay
` (2 preceding siblings ...)
2024-06-19 17:27 ` [PATCH 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL Hsiao Chien Sung via B4 Relay
@ 2024-06-19 17:27 ` Hsiao Chien Sung via B4 Relay
2024-06-19 17:27 ` [PATCH 5/5] drm/mediatek: Support alpha blending in display driver Hsiao Chien Sung via B4 Relay
4 siblings, 0 replies; 13+ messages in thread
From: Hsiao Chien Sung via B4 Relay @ 2024-06-19 17:27 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, linux-kernel, linux-arm-kernel,
Hsiao Chien Sung
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
index 48b714994492..bc43d0d760c1 100644
--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
+++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
@@ -177,7 +177,8 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
alpha_con |= state->base.alpha & MIXER_ALPHA;
}
- if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE)
+ if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE ||
+ state->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI)
alpha_con |= PREMULTI_SOURCE;
else
alpha_con |= NON_PREMULTI_SOURCE;
--
Git-146)
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH 5/5] drm/mediatek: Support alpha blending in display driver
2024-06-19 17:27 [PATCH 0/5] Support alpha blending in MTK display driver Hsiao Chien Sung via B4 Relay
` (3 preceding siblings ...)
2024-06-19 17:27 ` [PATCH 4/5] drm/mediatek: Support "Pre-multiplied" blending in Mixer Hsiao Chien Sung via B4 Relay
@ 2024-06-19 17:27 ` Hsiao Chien Sung via B4 Relay
4 siblings, 0 replies; 13+ messages in thread
From: Hsiao Chien Sung via B4 Relay @ 2024-06-19 17:27 UTC (permalink / raw)
To: Chun-Kuang Hu, Philipp Zabel, David Airlie, Daniel Vetter,
Matthias Brugger, AngeloGioacchino Del Regno
Cc: dri-devel, linux-mediatek, linux-kernel, linux-arm-kernel,
Hsiao Chien Sung, CK Hu
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
For more information, there are three pixel blend modes in DRM driver:
"None", "Pre-multiplied", and "Coverage".
To understand the difference between these modes, let's take a look at
the following two approaches to do alpha blending:
1. Straight:
dst.RGB = src.RGB * src.A + dst.RGB * (1 - src.A)
This is straightforward and easy to understand, when the source layer is
compositing with the destination layer, it's alpha will affect the
result. This is also known as "post-multiplied", or "Coverage" mode.
2. Pre-multiplied:
dst.RGB = src.RGB + dst.RGB * (1 - src.A)
Since the source RGB have already multiplied its alpha, only destination
RGB need to multiply it. This is the "Pre-multiplied" mode in DRM.
For the "None" blend mode in DRM, it means the pixel alpha is ignored
when compositing the layers, only the constant alpha for the composited
layer will take effects.
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_plane.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c
index 1723d4333f37..5bf757a3ef20 100644
--- a/drivers/gpu/drm/mediatek/mtk_plane.c
+++ b/drivers/gpu/drm/mediatek/mtk_plane.c
@@ -346,6 +346,17 @@ int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
DRM_INFO("Create rotation property failed\n");
}
+ err = drm_plane_create_alpha_property(plane);
+ if (err)
+ DRM_ERROR("failed to create property: alpha\n");
+
+ err = drm_plane_create_blend_mode_property(plane,
+ BIT(DRM_MODE_BLEND_PREMULTI) |
+ BIT(DRM_MODE_BLEND_COVERAGE) |
+ BIT(DRM_MODE_BLEND_PIXEL_NONE));
+ if (err)
+ DRM_ERROR("failed to create property: blend_mode\n");
+
drm_plane_helper_add(plane, &mtk_plane_helper_funcs);
return 0;
--
Git-146)
^ permalink raw reply [flat|nested] 13+ messages in thread