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From: Paolo Bonzini <pbonzini@redhat.com>
To: Yang Weijiang <weijiang.yang@intel.com>,
	jmattson@google.com, seanjc@google.com,
	kan.liang@linux.intel.com, like.xu.linux@gmail.com,
	vkuznets@redhat.com, wei.w.wang@intel.com, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v11 00/16] Introduce Architectural LBR for vPMU
Date: Tue, 10 May 2022 17:55:40 +0200	[thread overview]
Message-ID: <27e36c48-8062-7a02-aca2-80f32f61ae75@redhat.com> (raw)
In-Reply-To: <20220506033305.5135-1-weijiang.yang@intel.com>

On 5/6/22 05:32, Yang Weijiang wrote:
> [0] https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
> [1] https://lore.kernel.org/lkml/1593780569-62993-1-git-send-email-kan.liang@linux.intel.com/
> 
> Qemu patch:
> https://patchwork.ozlabs.org/project/qemu-devel/cover/20220215195258.29149-1-weijiang.yang@intel.com/
> 
> Previous version:
> v10: https://lore.kernel.org/all/20220422075509.353942-1-weijiang.yang@intel.com/
> 
> Changes in v11:
> 1. Moved MSR_ARCH_LBR_DEPTH/CTL check code to a unified function.[Kan]
> 2. Modified some commit messages per Kan's feedback.
> 3. Rebased the patch series to 5.18-rc5.

Thanks, this is mostly okay; the only remaining issues are Kan's 
feedback and saving/restoring on SMM enter/exit.

The QEMU patches look good too.

Paolo

  parent reply	other threads:[~2022-05-10 16:00 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-06  3:32 Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 01/16] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 02/16] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 03/16] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 04/16] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 05/16] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 06/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-05-06 14:39   ` Liang, Kan
2022-05-06  3:32 ` [PATCH v11 07/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-05-06 14:42   ` Liang, Kan
2022-05-06  3:32 ` [PATCH v11 08/16] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2022-05-06 15:03   ` Liang, Kan
2022-05-07  2:32     ` Yang, Weijiang
2022-05-09 14:06       ` Liang, Kan
2022-05-06  3:32 ` [PATCH v11 09/16] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-05-06  3:32 ` [PATCH v11 10/16] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-05-06  3:33 ` [PATCH v11 11/16] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-05-06  3:33 ` [PATCH v11 12/16] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2022-05-06  3:33 ` [PATCH v11 13/16] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2022-05-06 15:08   ` Liang, Kan
2022-05-06  3:33 ` [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-05-06 15:08   ` Liang, Kan
2022-05-10 15:51   ` Paolo Bonzini
2022-05-11  7:43     ` Yang, Weijiang
2022-05-12 13:18       ` Paolo Bonzini
2022-05-12 14:38         ` Yang, Weijiang
2022-05-13  4:02         ` Yang, Weijiang
2022-05-17  8:56           ` Yang, Weijiang
2022-05-17  9:01             ` Paolo Bonzini
2022-05-17 11:31               ` Yang, Weijiang
2022-05-12  6:44     ` Yang, Weijiang
2022-05-06  3:33 ` [PATCH v11 15/16] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2022-05-06 15:11   ` Liang, Kan
2022-05-06  3:33 ` [PATCH v11 16/16] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-05-06 15:13   ` Liang, Kan
2022-05-10 15:55 ` Paolo Bonzini [this message]
2022-05-11  0:29   ` [PATCH v11 00/16] Introduce Architectural LBR for vPMU Yang, Weijiang

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