From: Paolo Bonzini <pbonzini@redhat.com>
To: "Yang, Weijiang" <weijiang.yang@intel.com>,
"jmattson@google.com" <jmattson@google.com>,
"seanjc@google.com" <seanjc@google.com>,
"kan.liang@linux.intel.com" <kan.liang@linux.intel.com>,
"like.xu.linux@gmail.com" <like.xu.linux@gmail.com>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"Wang, Wei W" <wei.w.wang@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change
Date: Thu, 12 May 2022 15:18:40 +0200 [thread overview]
Message-ID: <8a15c4b4-cabe-7bc3-bd98-bd669d586616@redhat.com> (raw)
In-Reply-To: <9e2b5e9f-25a2-b724-c6d7-282dc987aa99@intel.com>
On 5/11/22 09:43, Yang, Weijiang wrote:
>>
>> Instead of using flip_arch_lbr_ctl, SMM should save the value of the MSR
>> in kvm_x86_ops->enter_smm, and restore it in kvm_x86_ops->leave_smm
>> (feel free to do it only if guest_cpuid_has(vcpu, X86_FEATURE_LM), i.e.
>> the 32-bit case can be ignored).
>
> In the case of migration in SMM, I assume kvm_x86_ops->enter_smm()
> called in source side
>
> and kvm_x86_ops->leave_smm() is called at destination, then should the
> saved LBREn be transferred
>
> to destination too? The destination can rely on the bit to defer setting
> LBREn bit in
Hi, it's transferred automatically if the MSR is saved in the SMM save
state area. Both enter_smm and leave_smm can access the save state area.
The enter_smm callback is called after saving "normal" state, and it has
to save the state + clear the bit; likewise, the leave_smm callback is
called before saving "normal" state and will restore the old value of
the MSR.
Thanks,
Paolo
> VMCS until kvm_x86_ops->leave_smm() is called. is it good? thanks!
next prev parent reply other threads:[~2022-05-12 13:18 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-06 3:32 [PATCH v11 00/16] Introduce Architectural LBR for vPMU Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 01/16] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 02/16] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 03/16] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 04/16] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 05/16] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 06/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-05-06 14:39 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 07/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-05-06 14:42 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 08/16] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2022-05-06 15:03 ` Liang, Kan
2022-05-07 2:32 ` Yang, Weijiang
2022-05-09 14:06 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 09/16] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 10/16] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 11/16] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 12/16] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 13/16] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2022-05-06 15:08 ` Liang, Kan
2022-05-06 3:33 ` [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-05-06 15:08 ` Liang, Kan
2022-05-10 15:51 ` Paolo Bonzini
2022-05-11 7:43 ` Yang, Weijiang
2022-05-12 13:18 ` Paolo Bonzini [this message]
2022-05-12 14:38 ` Yang, Weijiang
2022-05-13 4:02 ` Yang, Weijiang
2022-05-17 8:56 ` Yang, Weijiang
2022-05-17 9:01 ` Paolo Bonzini
2022-05-17 11:31 ` Yang, Weijiang
2022-05-12 6:44 ` Yang, Weijiang
2022-05-06 3:33 ` [PATCH v11 15/16] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2022-05-06 15:11 ` Liang, Kan
2022-05-06 3:33 ` [PATCH v11 16/16] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-05-06 15:13 ` Liang, Kan
2022-05-10 15:55 ` [PATCH v11 00/16] Introduce Architectural LBR for vPMU Paolo Bonzini
2022-05-11 0:29 ` Yang, Weijiang
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