From: "H. Nikolaus Schaller" <hns@goldelico.com>
To: Lee Jones <lee@kernel.org>
Cc: Paul Cercueil <paul@crapouillou.net>,
Linus Walleij <linusw@kernel.org>,
Paul Boddie <paul@boddie.org.uk>,
zhouyanjie@wanyeetech.com, Andreas Kemnade <andreas@kemnade.info>,
linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH 03/10] pinctrl: ingenic: Fix element type of x1600_sfc_funcs array
Date: Tue, 3 Nov 2026 23:00:56 +0100 [thread overview]
Message-ID: <2BA2B26F-C0A2-4E25-A612-D9DA513D6217@goldelico.com> (raw)
In-Reply-To: <20261103213002.1673560-4-lee@kernel.org>
Hi,
> Am 03.11.2026 um 22:29 schrieb Lee Jones <lee@kernel.org>:
>
> ingenic_pinmux_set_mux() treats grp->data as a u8 array of per-pin mux
> modes (u8 *pin_modes = grp->data), and every other *_funcs array in the
> Ingenic pinctrl driver is declared as u8[]. Because x1600_sfc_funcs[]
> was declared as int[], indexing pin_modes[0..6] reads the first seven
> bytes of the int array (0, 0, 0, 0, 0, 0, 0) instead of reading mode 2
> for the seventh pin.
>
> Change the element type of x1600_sfc_funcs[] from int to u8.
>
> Fixes: 4da56f9c6f14 ("pinctrl: ingenic: add x1600 support")
> Closes: https://sashiko.dev/#/bug/linux-5dccd0ae-9450-440a-87d0-44cc86d1af45
> Cc: stable@vger.kernel.org
> Signed-off-by: Lee Jones <lee@kernel.org>
> ---
> drivers/pinctrl/pinctrl-ingenic.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
> index 1aa6a6dc1209..5c06208b8854 100644
> --- a/drivers/pinctrl/pinctrl-ingenic.c
> +++ b/drivers/pinctrl/pinctrl-ingenic.c
> @@ -2456,7 +2456,7 @@ static int x1600_mac_pins[] = {
> 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c,
> };
>
> -static int x1600_sfc_funcs[] = { 0, 0, 0, 0, 0, 0, 2, };
> +static u8 x1600_sfc_funcs[] = { 0, 0, 0, 0, 0, 0, 2, };
Yes, that appears to be the correct fix. All other INGENIC_PIN_GROUP_FUNCS()
use u8 arrays.
I can not test as our x1600 board does not use the SFC interface.
>
> static const struct group_desc x1600_groups[] = {
> INGENIC_PIN_GROUP("uart0-data", x1600_uart0_data, 0),
> --
> 2.56.0.385.gac671c819a-goog
Reviewed-by: H. Nikolaus Schaller <hns@goldelico.com>
next prev parent reply other threads:[~2026-11-03 22:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 21:29 [PATCH 00/10] pinctrl: Fix out-of-bounds accesses, divide-by-zero, and error handling Lee Jones
2026-11-03 21:29 ` [PATCH 01/10] pinctrl: sunxi: Fix out-of-bounds irq_bank index when first bank has no IRQs Lee Jones
2026-11-03 21:29 ` [PATCH 02/10] pinctrl: tegra186: Fix out-of-bounds register bank index for AON drive groups Lee Jones
2026-11-03 21:29 ` [PATCH 03/10] pinctrl: ingenic: Fix element type of x1600_sfc_funcs array Lee Jones
2026-11-03 22:00 ` H. Nikolaus Schaller [this message]
2026-11-03 21:29 ` [PATCH 04/10] pinctrl: mediatek: mt7981: Add missing entries to mt7981_ant_sel_funcs Lee Jones
2026-11-03 21:29 ` [PATCH 05/10] pinctrl: realtek: Prevent out-of-bounds access in rtd_pinctrl_find_config() Lee Jones
2026-11-03 21:29 ` [PATCH 06/10] pinctrl: realtek: Fix bit shift when configuring RTD_HIGH_VIL Lee Jones
2026-11-03 21:29 ` [PATCH 07/10] pinctrl: realtek: Initialise omitted offset fields to NA in config macros Lee Jones
2026-11-03 21:29 ` [PATCH 08/10] pinctrl: mediatek: Clean up partially initialised hw->eint on error Lee Jones
2026-11-03 21:29 ` [PATCH 09/10] pinctrl: mediatek: Prevent divide-by-zero for pins with fixed drive strength Lee Jones
2026-11-03 21:29 ` [PATCH 10/10] pinctrl: qcom: Check qcom_scm_io_readl() return value in msm_gpio_irq_set_type() Lee Jones
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