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From: Jie Gan <quic_jiegan@quicinc.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	James Clark <james.clark@linaro.org>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>
Cc: Tingwei Zhang <quic_tingweiz@quicinc.com>,
	Jinlong Mao <quic_jinlmao@quicinc.com>,
	<coresight@lists.linaro.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-msm@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH v15 09/10] Coresight: Add Coresight TMC Control Unit driver
Date: Wed, 5 Mar 2025 09:39:45 +0800	[thread overview]
Message-ID: <2ab83252-fe17-489c-b103-28ce769123a3@quicinc.com> (raw)
In-Reply-To: <1b05e832-6d41-463a-a52a-6ff340d0d6f8@arm.com>



On 3/4/2025 10:59 PM, Suzuki K Poulose wrote:
> On 03/03/2025 03:29, Jie Gan wrote:
>> The Coresight TMC Control Unit hosts miscellaneous configuration 
>> registers
>> which control various features related to TMC ETR sink.
>>
>> Based on the trace ID, which is programmed in the related CTCU ATID
>> register of a specific ETR, trace data with that trace ID gets into
>> the ETR buffer, while other trace data gets dropped.
>>
>> Enabling source device sets one bit of the ATID register based on
>> source device's trace ID.
>> Disabling source device resets the bit according to the source
>> device's trace ID.
>>
>> Reviewed-by: James Clark <james.clark@linaro.org>
>> Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
> 
> ...
> 
>> --- /dev/null
>> +++ b/drivers/hwtracing/coresight/coresight-ctcu.h
>> @@ -0,0 +1,39 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All 
>> rights reserved.
>> + */
>> +
>> +#ifndef _CORESIGHT_CTCU_H
>> +#define _CORESIGHT_CTCU_H
>> +#include "coresight-trace-id.h"
>> +
>> +/* Maximum number of supported ETR devices for a single CTCU. */
>> +#define ETR_MAX_NUM     2
>> +
> 
> WARNING: please, no space before tabs
> #413: FILE: drivers/hwtracing/coresight/coresight-ctcu.h:11:
> +#define ETR_MAX_NUM ^I2$
> 
> total: 0 errors, 2 warnings, 397 lines checked
> 
> Another checkpatch warning. Please take care in the future.
> 
> Suzuki

Hi Suzuki,

Got it. Will take care in the future. Thanks for help to deal with them 
this time.

Jie

> 
> 


  reply	other threads:[~2025-03-05  1:40 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-03  3:29 [PATCH v15 00/10] " Jie Gan
2025-03-03  3:29 ` [PATCH v15 01/10] Coresight: Add support for new APB clock name Jie Gan
2025-03-03  3:29 ` [PATCH v15 02/10] Coresight: Add trace_id function to retrieving the trace ID Jie Gan
2025-03-05 11:07   ` Mike Leach
2025-03-05 13:27     ` Jie Gan
2025-03-05 14:58       ` Mike Leach
2025-03-05 15:25         ` Jie Gan
2025-03-03  3:29 ` [PATCH v15 03/10] Coresight: Use coresight_etm_get_trace_id() in traceid_show() Jie Gan
2025-03-03  3:29 ` [PATCH v15 04/10] Coresight: Introduce a new struct coresight_path Jie Gan
2025-03-04 16:10   ` Suzuki K Poulose
2025-03-05  1:34     ` Jie Gan
2025-03-03  3:29 ` [PATCH v15 05/10] Coresight: Allocate trace ID after building the path Jie Gan
2025-03-04 14:58   ` Suzuki K Poulose
2025-03-05  1:37     ` Jie Gan
2025-03-03  3:29 ` [PATCH v15 06/10] Coresight: Change to read the trace ID from coresight_path Jie Gan
2025-03-03  3:29 ` [PATCH v15 07/10] Coresight: Change functions to accept the coresight_path Jie Gan
2025-03-03  3:29 ` [PATCH v15 08/10] dt-bindings: arm: Add Coresight TMC Control Unit hardware Jie Gan
2025-03-03  3:29 ` [PATCH v15 09/10] Coresight: Add Coresight TMC Control Unit driver Jie Gan
2025-03-04 14:59   ` Suzuki K Poulose
2025-03-05  1:39     ` Jie Gan [this message]
2025-03-03  3:29 ` [PATCH v15 10/10] arm64: dts: qcom: sa8775p: Add CTCU and ETR nodes Jie Gan
2025-03-04 12:28   ` Suzuki K Poulose
2025-03-10  2:57     ` Jie Gan
2025-03-10  9:46       ` Konrad Dybcio
2025-03-05 11:05 ` [PATCH v15 00/10] [subset] Coresight: Add Coresight TMC Control Unit driver Suzuki K Poulose
2025-03-14 20:01 ` (subset) [PATCH v15 00/10] " Bjorn Andersson

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